Makefile Verbosity

[Ajay Jain]

Hi,

I would like to know the options to control the verbosity of a
Makefile. For example: I am writing a build system which has hundreds
of files. Sometimes, it becomes an issue to see a huge print log.
Sometimes I do not want output on shell. Can I do something?

1) I saw the make manual, but make ---debug=b does not suit my purpose.
2) The other option that I have is to take a variable from command
line. For example : V=0/1 and then if V=0, I prepend a '@' in front of
every rule. However, I have some rules in a central location, but
others are all over the system. And this does not sound very neat.

Any ideas? OR What is the standard procedure?

Regards,
Ajay.