Re: question about parallel optimzation

[Oleksandr Gavenko]

On 14.04.2011 4:52, Paul Smith wrote:
> On Wed, 2011-04-13 at 16:30 +0300, Oleksandr Gavenko wrote:
> > parallel-build:
> >         make -C $(dir1)&  make -C $(dir2)&
>
> Note: _never_ use the literal string "make" in a recipe.  Always use
> $(MAKE).
Thanks for correction.

> > Above example have disadvantage as main Make do not wait for spawned
> > child processes.
>
> You should instead write it as something like:
>
>         build: $(dir1) $(dir2)
>         $(dir1) $(dir2):
>                 $(MAKE) -C $@
>         .PHONY: build $(dir1) $(dir2)
So this allow control number of parallel running recursive Makes!

I have 2 level project:

dir1
  proj1
  proj2
dir2
  proj1
  proj2

Each proj have low capability on parallel target building but each proj
can be built independently.

I previously use:

  for dir in $(wildcard */.); do \
    $(MAKE) -C $$dir; \
  done

for both dir-level and proj-level Makefiles, which very inefficient.

Next I use trick with "xargs  --max-procs=$(N)".

But your solution is more right as portable and in the spirit of GNU 
Make ideology!

I write top-most Makefile:

DIR_LIST := $(patsubst %/.,%,$(wildcard */.))

ALL_TARGETS := $(patsubst %,all-%,$(DIR_LIST))
CLEAN_TARGETS := $(patsubst %,clean-%,$(DIR_LIST))

# $(1)  base target name
define COMMAND
  [ -f $(patsubst $(1)-%,%,$@)/Makefile ] && $(MAKE) -C $(patsubst 
$(1)-%,%,$@) $(1) || :
endef

.PHONY: all
all: $(ALL_TARGETS)
.PHONY: $(ALL_TARGETS)
$(ALL_TARGETS):
        $(call COMMAND,all)

.PHONY: clean
clean: $(CLEAN_TARGETS)
.PHONY: $(CLEAN_TARGETS)
$(CLEAN_TARGETS):
        $(call COMMAND,clean)

In all subdirs I write single line Makefile:

include ../Makefile

--
С уважением, Александр Гавенко.