AW: make help

[Thomas Christian]

Hello!

I followed your advice and you were right, there was a space after the first 
SUBDIRS entry. However when I add a second path to SUBDIRS variable I get the 
same error, again.

SUBDIRS := \
src/test/usb_cdc_lolevel \
src/module/cpu

$(info SUBDIRS='$(SUBDIRS)') shows:

SUBDIRS='src/test/usb_cdc_lolevel src/module/cpu'

When you use multiple paths within a variable, how do you separate them in this 
case?

Thank you for your help :)

Christian

Von: Rakesh Sharma [mailto:address@hidden
Gesendet: Dienstag, 17. November 2015 05:20
An: Thomas Christian
Betreff: Re: make help


> Hello!
>
> I am currently setting up a make file (at least I try) for building a firmware
> image for a cortex M4 MCU.
>
> However I am struggeling at this point:
>
> DIR := \
> D:/test/
>
> SUBDIRS := \
> src/test/usb_cdc_lolevel
>
> C_SRCS := \
> $(wildcard $(DIR)src/test/usb_cdc_lolevel/*.c)
>
> OBJS := \
> $(patsubst $(DIR)src/test/usb_cdc_lolevel/%.c, ./src/test/usb_cdc_lolevel/%.o,
> $(C_SRCS))
>
> C_DEPS := \
> $(wildcard ./src/test/usb_cdc_lolevel/*.d)
>
> ./src/test/usb_cdc_lolevel/%.o: $(DIR)src/test/usb_cdc_lolevel/%.c
>                 @echo 'Building file: $<'
>                 @echo 'Invoking: Cross ARM C Compiler'
>                 arm-none-eabi-gcc $(CFLAGS) $(INCDIRS) -MMD -MP
> -MF"$(@:%.o=%.d)" -MT"$@" -c -o "$@" "$<"
>                 @echo 'Finished building: $<'
>                 @echo ' '
>
> All I want to do is replacing the hardcoded string using a variable I have
> defined before, so it looks like:
>
> C_SRCS := \
> $(wildcard $(DIR)$(SUBDIRS)/*.c)
>
> OBJS := \
> $(patsubst $(DIR)$(SUBDIRS)/%.c, ./$(SUBDIRS)/%.o, $(C_SRCS))
>
> C_DEPS := \
> $(wildcard ./$(SUBDIRS)/*.d)
>
> # Each subdirectory must supply rules for building sources it contributes
> ./$(SUBDIRS)/%.o: $(DIR)$(SUBDIRS)/%.c
>                 @echo 'Building file: $<'
>                 @echo 'Invoking: Cross ARM C Compiler'
>                 arm-none-eabi-gcc $(CFLAGS) $(INCDIRS) -MMD -MP
> -MF"$(@:%.o=%.d)" -MT"$@" -c -o "$@" "$<"
>                 @echo 'Finished building: $<'
>                 @echo ' '
>
> These changes throw me an error "*** mixed implicit and normal rules:
> deprecated syntax" on line "./$(SUBDIRS)/%.o: $(DIR)$(SUBDIRS)/%.c", already
> googled this issue and it seems to happen to quiet some people. As far as I
> understand the issue is the "/%" occurance. It's driving me nuts because it
> seems I am not able to fix it on my own (I have little to no experience in
> writing make files so far)
>
> Any help or hint would be appreciated!
>
> Thank you!
>
> Regards
> Christian
>

This error indicates that there must be spaces somewhere within the $(SUBDIRS) 
variable.

Place this code in your Makefile, to verify:
$(info SUBDIRS='$(SUBDIRS)')

You need to ensure that there are NO trailing blanks in the SUBDIRS variable 
definition line
> SUBDIRS := \
> src/test/usb_cdc_lolevel

especially after the _lolevel

To avoid running into such insidious errors, it's a good idea to terminate your 
make variables with a terminating hash, like as,

SUBDIRS := \
src/test/usb_cdc_lolevel#

HTH

-Rakesh