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Re: [lwip-users] Memory alignment and DMA controllers


From: Simon Goldschmidt
Subject: Re: [lwip-users] Memory alignment and DMA controllers
Date: Tue, 16 Jan 2018 10:53:25 +0100

Will Wykeham wrote:
> So you're saying that a memcpy/memmove fallback is always going to
> need to be coded up, and the goal of the stack is to minimise how
> often it has to get called? That makes sense.

Yes.
 
> Is there anything in the stack itself that has expectations about
> memory alignment, or is this just for driver interfacing?

The stack itself uses packed structs to not require alignment. E.g.
PPP input packets are rarely aligned. Applications might required
alignment though, but of course you'll have to decide for on or the
other in such a case.
 
> Cache wise - cache line alignment shouldn't be needed for safety,
> you just may end up having to flush more than you otherwise would
> to get everything into memory.

It's not needed for "safety", it's just needed to not get corrupted
data. This is because for PBUF_RAM or PBUF_POOL, struct pbuf is
adjacent to the payload.

See this page for a description if you're interested (section
"Buffer Alignment"):
http://www.pebblebay.com/a-guide-to-using-direct-memory-access-in-embedded-systems-part-two/

Cheers,
Simon



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