qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-arm] [PATCH 13/16] target-arm: Add QOM property for Secure mem


From: Edgar E. Iglesias
Subject: Re: [Qemu-arm] [PATCH 13/16] target-arm: Add QOM property for Secure memory region
Date: Fri, 6 Nov 2015 15:33:29 +0100
User-agent: Mutt/1.5.21 (2010-09-15)

On Thu, Nov 05, 2015 at 06:15:55PM +0000, Peter Maydell wrote:
> Add QOM property to the ARM CPU which boards can use to tell us what
> memory region to use for secure accesses. Nonsecure accesses
> go via the memory region specified with the base CPU class 'memory'
> property.
> 
> By default, if no secure region is specified it is the same as the
> nonsecure region, and if no nonsecure region is specified we will use
> address_space_memory.
> 
> Signed-off-by: Peter Maydell <address@hidden>


Reviewed-by: Edgar E. Iglesias <address@hidden>



> ---
>  target-arm/cpu-qom.h |  3 +++
>  target-arm/cpu.c     | 26 ++++++++++++++++++++++++++
>  2 files changed, 29 insertions(+)
> 
> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
> index 53d3129..75dc74e 100644
> --- a/target-arm/cpu-qom.h
> +++ b/target-arm/cpu-qom.h
> @@ -87,6 +87,9 @@ typedef struct ARMCPU {
>      /* GPIO outputs for generic timer */
>      qemu_irq gt_timer_outputs[NUM_GTIMERS];
>  
> +    /* MemoryRegion to use for secure physical accesses */
> +    MemoryRegion *secure_memory;
> +
>      /* 'compatible' string for this CPU for Linux device trees */
>      const char *dtb_compatible;
>  
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 7789d50..85e2bc8 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -542,6 +542,15 @@ static void arm_cpu_post_init(Object *obj)
>           */
>          qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property,
>                                   &error_abort);
> +
> +#ifndef CONFIG_USER_ONLY
> +        object_property_add_link(obj, "secure-memory",
> +                                 TYPE_MEMORY_REGION,
> +                                 (Object **)&cpu->secure_memory,
> +                                 qdev_prop_allow_set_link_before_realize,
> +                                 OBJ_PROP_LINK_UNREF_ON_RELEASE,
> +                                 &error_abort);
> +#endif
>      }
>  
>      if (arm_feature(&cpu->env, ARM_FEATURE_MPU)) {
> @@ -665,6 +674,23 @@ static void arm_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>  
>      init_cpreg_list(cpu);
>  
> +#ifndef CONFIG_USER_ONLY
> +    if (cpu->has_el3) {
> +        AddressSpace *as;
> +
> +        if (!cpu->secure_memory) {
> +            cpu->secure_memory = cs->memory;
> +        }
> +        as = address_space_init_shareable(cpu->secure_memory,
> +                                          "cpu-secure-memory");
> +        cpu_address_space_init(cs, as, ARMASIdx_S);
> +    }
> +    cpu_address_space_init(cs,
> +                           address_space_init_shareable(cs->memory,
> +                                                        "cpu-memory"),
> +                           ARMASIdx_NS);
> +#endif
> +
>      qemu_init_vcpu(cs);
>      cpu_reset(cs);
>  
> -- 
> 1.9.1
> 



reply via email to

[Prev in Thread] Current Thread [Next in Thread]