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Re: [Qemu-arm] [PATCH v2 14/26] armv7m: prevent unprivileged write to ST


From: Peter Maydell
Subject: Re: [Qemu-arm] [PATCH v2 14/26] armv7m: prevent unprivileged write to STIR
Date: Thu, 17 Dec 2015 19:33:36 +0000

On 3 December 2015 at 00:18, Michael Davidsaver <address@hidden> wrote:
> Prevent unprivileged from writing to the

"unprivileged writes to the"

> Software Triggered Interrupt register

".".

> ---
>  hw/intc/armv7m_nvic.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
> index 0f9ca6a..5731146 100644
> --- a/hw/intc/armv7m_nvic.c
> +++ b/hw/intc/armv7m_nvic.c
> @@ -727,7 +727,9 @@ static void nvic_writel(NVICState *s, uint32_t offset, 
> uint32_t value)
>                        "NVIC: Aux fault status registers unimplemented\n");
>          break;
>      case 0xf00: /* Software Triggered Interrupt Register */
> -        if ((value & 0x1ff) < NVIC_MAX_IRQ) {
> +        /* STIR write allowed if privlaged or USERSETMPEND set */

You'll want to use the #define of CCR_USERSETMPEND that you'll
add to the previous patch. If you do that then the comment is
no longer really needed as the code itself is fairly straightforward.
(If you want to keep it then "privileged".)

> +        if ((arm_current_el(&cpu->env) || (cpu->env.v7m.ccr & 2))
> +            && ((value & 0x1ff) < NVIC_MAX_IRQ)) {
>              armv7m_nvic_set_pending(s, (value&0x1ff)+16);
>          }
>          break;

thanks
-- PMM



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