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Re: [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region
From: |
Pavel Fedin |
Subject: |
Re: [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region |
Date: |
Thu, 28 Jan 2016 10:10:06 +0300 |
Hello!
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 3839c68..7eaf8be 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -125,6 +125,7 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> + [VIRT_RESERVED] = { 0x0be00000, 0x00100000 },
Looks like with this approach we would need to add this to all machine models
which make use of PCI. But is it a good idea? As far
as i understand, the only requirement for this region is not to clash with
guest RAM addresses. So, can we instead have some code,
which automatically finds some place, based on the size? For now we hardcode
the size to 0x00100000, but in future we could query
the host for the size, because it's still host's MSI controller.
Kind regards,
Pavel Fedin
Senior Engineer
Samsung Electronics Research center Russia
- [Qemu-arm] [RFC 0/7] KVM PCI/MSI passthrough with mach-virt, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 1/7] linux-headers: partial update for VFIO reserved IOVA registration, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 2/7] Add a function to determine interrupt number for INTx routing, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 3/7] Generic PCIe host bridge INTx determination for INTx routing, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 4/7] hw: vfio: common: introduce vfio_register_reserved_iova, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 5/7] memory: add reserved_iova region type, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 6/7] hw: arm: virt: register reserved IOVA region, Eric Auger, 2016/01/27
- [Qemu-arm] [RFC 7/7] hw: vfio: common: adapt vfio_listeners for reserved_iova region, Eric Auger, 2016/01/27