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[Qemu-arm] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2)
From: |
xiaoqiang zhao |
Subject: |
[Qemu-arm] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2) |
Date: |
Thu, 25 Feb 2016 18:30:32 +0800 |
assign DeviceClass::vmsd instead of using vmstate_register function
Signed-off-by: xiaoqiang zhao <address@hidden>
---
hw/timer/m48t59.c | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index 3c683aa..f5897d8 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -637,6 +637,26 @@ static const VMStateDescription vmstate_m48t59 = {
}
};
+static const VMStateDescription vmstate_m48t59_isa = {
+ .name = "m48t59",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT(state, M48txxISAState, 0, vmstate_m48t59, M48t59State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_m48t59_sys_bus = {
+ .name = "m48t59",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT(state, M48txxSysBusState, 0, vmstate_m48t59,
M48t59State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void m48t59_reset_common(M48t59State *NVRAM)
{
NVRAM->addr = 0;
@@ -742,8 +762,6 @@ static void m48t59_realize_common(M48t59State *s, Error
**errp)
s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s);
}
qemu_get_timedate(&s->alarm, 0);
-
- vmstate_register(NULL, -1, &vmstate_m48t59, s);
}
static void m48t59_isa_realize(DeviceState *dev, Error **errp)
@@ -822,6 +840,7 @@ static void m48txx_isa_class_init(ObjectClass *klass, void
*data)
dc->realize = m48t59_isa_realize;
dc->reset = m48t59_reset_isa;
dc->props = m48t59_isa_properties;
+ dc->vmsd = &vmstate_m48t59_isa;
nc->read = m48txx_isa_read;
nc->write = m48txx_isa_write;
nc->toggle_lock = m48txx_isa_toggle_lock;
@@ -866,6 +885,7 @@ static void m48txx_sysbus_class_init(ObjectClass *klass,
void *data)
dc->realize = m48t59_realize;
dc->reset = m48t59_reset_sysbus;
dc->props = m48t59_sysbus_properties;
+ dc->vmsd = &vmstate_m48t59_sys_bus;
nc->read = m48txx_sysbus_read;
nc->write = m48txx_sysbus_write;
nc->toggle_lock = m48txx_sysbus_toggle_lock;
--
2.1.4
- [Qemu-arm] [PATCH v5 0/8] QOM'ify hw/timer/*, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 5/8] hw/timer: QOM'ify milkymist_sysctl, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2),
xiaoqiang zhao <=
- [Qemu-arm] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 7/8] hw/timer: QOM'ify slavio_timer, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 8/8] hw/timer: QOM'ify grlib_gptimer, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1), xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 6/8] hw/timer: QOM'ify puv3_ost, xiaoqiang zhao, 2016/02/25
- [Qemu-arm] [PATCH v5 2/8] hw/timer: QOM'ify lm32_timer, xiaoqiang zhao, 2016/02/25
- Re: [Qemu-arm] [PATCH v5 0/8] QOM'ify hw/timer/*, Peter Maydell, 2016/02/25