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Re: [Qemu-arm] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support m
From: |
Alex Bennée |
Subject: |
Re: [Qemu-arm] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support more than 8 cpus |
Date: |
Mon, 06 Jun 2016 18:32:56 +0100 |
User-agent: |
mu4e 0.9.17; emacs 25.0.94.5 |
Andrew Jones <address@hidden> writes:
> On Mon, Jun 06, 2016 at 05:22:49PM +0100, Alex Bennée wrote:
>>
>> Andrew Jones <address@hidden> writes:
>>
>> > Signed-off-by: Andrew Jones <address@hidden>
>> > ---
>> > arm/run | 19 ++++++++++++-------
>> > arm/selftest.c | 5 ++++-
>> > lib/arm/asm/processor.h | 9 +++++++--
>> > lib/arm/asm/setup.h | 4 ++--
>> > lib/arm/setup.c | 12 +++++++++++-
>> > lib/arm64/asm/processor.h | 9 +++++++--
>> > 6 files changed, 43 insertions(+), 15 deletions(-)
>> >
>> > diff --git a/arm/run b/arm/run
>> > index a2f35ef6a7e63..2d0698619606e 100755
>> > --- a/arm/run
>> > +++ b/arm/run
>> > @@ -31,13 +31,6 @@ if [ -z "$ACCEL" ]; then
>> > fi
>> > fi
>> >
>> > -if [ "$HOST" = "aarch64" ] && [ "$ACCEL" = "kvm" ]; then
>> > - processor="host"
>> > - if [ "$ARCH" = "arm" ]; then
>> > - processor+=",aarch64=off"
>> > - fi
>> > -fi
>> > -
>> > qemu="${QEMU:-qemu-system-$ARCH_NAME}"
>> > qpath=$(which $qemu 2>/dev/null)
>> >
>> > @@ -53,6 +46,18 @@ fi
>> >
>> > M='-machine virt'
>> >
>> > +if [ "$ACCEL" = "kvm" ]; then
>> > + if $qemu $M,\? 2>&1 | grep gic-version > /dev/null; then
>> > + M+=',gic-version=host'
>> > + fi
>> > + if [ "$HOST" = "aarch64" ]; then
>> > + processor="host"
>> > + if [ "$ARCH" = "arm" ]; then
>> > + processor+=",aarch64=off"
>> > + fi
>> > + fi
>> > +fi
>> > +
>> > if ! $qemu $M -device '?' 2>&1 | grep virtconsole > /dev/null; then
>> > echo "$qpath doesn't support virtio-console for chr-testdev. Exiting."
>> > exit 2
>> > diff --git a/arm/selftest.c b/arm/selftest.c
>> > index 5656f2bb1cc88..ad1f452f8ebfa 100644
>> > --- a/arm/selftest.c
>> > +++ b/arm/selftest.c
>> > @@ -313,9 +313,10 @@ static bool psci_check(void)
>> > static cpumask_t smp_reported;
>> > static void cpu_report(void)
>> > {
>> > + unsigned long mpidr = get_mpidr();
>> > int cpu = smp_processor_id();
>> >
>> > - report("CPU%d online", true, cpu);
>> > + report("CPU(%3d) mpidr=%lx", mpidr_to_cpu(mpidr) == cpu, cpu, mpidr);
>> > cpumask_set_cpu(cpu, &smp_reported);
>> > halt();
>> > }
>> > @@ -344,6 +345,7 @@ int main(int argc, char **argv)
>> >
>> > } else if (strcmp(argv[1], "smp") == 0) {
>> >
>> > + unsigned long mpidr = get_mpidr();
>> > int cpu;
>> >
>> > report("PSCI version", psci_check());
>> > @@ -354,6 +356,7 @@ int main(int argc, char **argv)
>> > smp_boot_secondary(cpu, cpu_report);
>> > }
>> >
>> > + report("CPU(%3d) mpidr=%lx", mpidr_to_cpu(mpidr) == 0, 0,
>> > mpidr);
>> > cpumask_set_cpu(0, &smp_reported);
>> > while (!cpumask_full(&smp_reported))
>> > cpu_relax();
>> > diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h
>> > index f25e7eee3666c..d2048f5f5f7e6 100644
>> > --- a/lib/arm/asm/processor.h
>> > +++ b/lib/arm/asm/processor.h
>> > @@ -40,8 +40,13 @@ static inline unsigned int get_mpidr(void)
>> > return mpidr;
>> > }
>> >
>> > -/* Only support Aff0 for now, up to 4 cpus */
>> > -#define mpidr_to_cpu(mpidr) ((int)((mpidr) & 0xff))
>> > +#define MPIDR_HWID_BITMASK 0xffffff
>> > +extern int mpidr_to_cpu(unsigned long mpidr);
>> > +
>> > +#define MPIDR_LEVEL_SHIFT(level) \
>> > + (((1 << level) >> 1) << 3)
>> > +#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
>> > + ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & 0xff)
>> >
>> > extern void start_usr(void (*func)(void *arg), void *arg, unsigned long
>> > sp_usr);
>> > extern bool is_user(void);
>> > diff --git a/lib/arm/asm/setup.h b/lib/arm/asm/setup.h
>> > index cb8fdbd38dd5d..c501c6ddd8657 100644
>> > --- a/lib/arm/asm/setup.h
>> > +++ b/lib/arm/asm/setup.h
>> > @@ -10,8 +10,8 @@
>> > #include <asm/page.h>
>> > #include <asm/pgtable-hwdef.h>
>> >
>> > -#define NR_CPUS 8
>> > -extern u32 cpus[NR_CPUS];
>> > +#define NR_CPUS 255
>> > +extern u64 cpus[NR_CPUS];
>> > extern int nr_cpus;
>> >
>> > #define NR_MEM_REGIONS 8
>> > diff --git a/lib/arm/setup.c b/lib/arm/setup.c
>> > index 8c6172ff94106..1d6b6949c920e 100644
>> > --- a/lib/arm/setup.c
>> > +++ b/lib/arm/setup.c
>> > @@ -24,12 +24,22 @@ extern unsigned long stacktop;
>> > extern void io_init(void);
>> > extern void setup_args(const char *args);
>> >
>> > -u32 cpus[NR_CPUS] = { [0 ... NR_CPUS-1] = (~0U) };
>> > +u64 cpus[NR_CPUS] = { [0 ... NR_CPUS-1] = (~0U) };
>> > int nr_cpus;
>> >
>> > struct mem_region mem_regions[NR_MEM_REGIONS];
>> > phys_addr_t __phys_offset, __phys_end;
>> >
>> > +int mpidr_to_cpu(unsigned long mpidr)
>> > +{
>> > + int i;
>> > +
>> > + for (i = 0; i < nr_cpus; ++i)
>> > + if (cpus[i] == (mpidr & MPIDR_HWID_BITMASK))
>> > + return i;
>> > + return -1;
>> > +}
>> > +
>> > static void cpu_set(int fdtnode __unused, u32 regval, void *info __unused)
>> > {
>> > int cpu = nr_cpus++;
>> > diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
>> > index 9a208ff729b7e..7e448dc81a6aa 100644
>> > --- a/lib/arm64/asm/processor.h
>> > +++ b/lib/arm64/asm/processor.h
>> > @@ -78,8 +78,13 @@ static inline type get_##reg(void)
>> > \
>> >
>> > DEFINE_GET_SYSREG64(mpidr)
>> >
>> > -/* Only support Aff0 for now, gicv2 only */
>> > -#define mpidr_to_cpu(mpidr) ((int)((mpidr) & 0xff))
>> > +#define MPIDR_HWID_BITMASK 0xff00ffffff
>> > +extern int mpidr_to_cpu(unsigned long mpidr);
>> > +
>> > +#define MPIDR_LEVEL_SHIFT(level) \
>> > + (((1 << level) >> 1) << 3)
>> > +#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
>> > + ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & 0xff)
>>
>> Doesn't Aff3 break this little macro? It sits at 32:39 with a gap for
>> MT, RES0, U, RES1 for bits 25:31
>
> Nope, doesn't break. I had the same thought when I lifted it from
> Linux, but stare at it long enough and you'll see that it works :-)
Maybe a comment although I'm hard pressed to think of a good one except
maybe and explicit:
/* Shifts to 0, 8, 16, 32 */
But either way:
Reviewed-by: Alex Bennée <address@hidden>
>
> Thanks,
> drew
>
>>
>> >
>> > extern void start_usr(void (*func)(void *arg), void *arg, unsigned long
>> > sp_usr);
>> > extern bool is_user(void);
>>
>>
>> --
>> Alex Bennée
>> --
>> To unsubscribe from this list: send the line "unsubscribe kvm" in
>> the body of a message to address@hidden
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Alex Bennée
[Qemu-arm] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 06/10] arm/arm64: add initial gicv2 support, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 05/10] arm/arm64: irq enable/disable, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 10/10] arm/arm64: gic: don't just use zero, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 07/10] arm/arm64: add initial gicv3 support, Andrew Jones, 2016/06/04