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Re: [Qemu-arm] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay
From: |
Alex Bennée |
Subject: |
Re: [Qemu-arm] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines |
Date: |
Mon, 06 Jun 2016 18:39:50 +0100 |
User-agent: |
mu4e 0.9.17; emacs 25.0.94.5 |
Andrew Jones <address@hidden> writes:
> Allow a thread to wait some specified amount of time. Can
> specify in cycles, usecs, and msecs.
I wonder if delay() and mdelay() can be in common code with just the
freq and count getting functions in specific code? I guess that would
need a lib/arm-generic/ or some such?
Otherwise:
Reviewed-by: Alex Bennée <address@hidden>
>
> Signed-off-by: Andrew Jones <address@hidden>
> ---
> lib/arm/asm/processor.h | 19 +++++++++++++++++++
> lib/arm/processor.c | 15 +++++++++++++++
> lib/arm64/asm/processor.h | 19 +++++++++++++++++++
> lib/arm64/processor.c | 15 +++++++++++++++
> 4 files changed, 68 insertions(+)
>
> diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h
> index d2048f5f5f7e6..afc903ca7d4ab 100644
> --- a/lib/arm/asm/processor.h
> +++ b/lib/arm/asm/processor.h
> @@ -5,7 +5,9 @@
> *
> * This work is licensed under the terms of the GNU LGPL, version 2.
> */
> +#include <libcflat.h>
> #include <asm/ptrace.h>
> +#include <asm/barrier.h>
>
> enum vector {
> EXCPTN_RST,
> @@ -51,4 +53,21 @@ extern int mpidr_to_cpu(unsigned long mpidr);
> extern void start_usr(void (*func)(void *arg), void *arg, unsigned long
> sp_usr);
> extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> + u64 vct;
> + isb();
> + asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (vct));
> + return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> + while (msecs--)
> + udelay(1000);
> +}
> +
> #endif /* _ASMARM_PROCESSOR_H_ */
> diff --git a/lib/arm/processor.c b/lib/arm/processor.c
> index 54fdb87ef0196..c2ee360df6884 100644
> --- a/lib/arm/processor.c
> +++ b/lib/arm/processor.c
> @@ -9,6 +9,7 @@
> #include <asm/ptrace.h>
> #include <asm/processor.h>
> #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
> static const char *processor_modes[] = {
> "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" ,
> @@ -141,3 +142,17 @@ bool is_user(void)
> {
> return current_thread_info()->flags & TIF_USER_MODE;
> }
> +
> +void delay(u64 cycles)
> +{
> + u64 start = get_cntvct();
> + while ((get_cntvct() - start) < cycles)
> + cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> + unsigned int frq;
> + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> + delay((u64)usec * frq / 1000000);
> +}
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 7e448dc81a6aa..94f7ce35b65c1 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -17,8 +17,10 @@
> #define SCTLR_EL1_M (1 << 0)
>
> #ifndef __ASSEMBLY__
> +#include <libcflat.h>
> #include <asm/ptrace.h>
> #include <asm/esr.h>
> +#include <asm/barrier.h>
>
> enum vector {
> EL1T_SYNC,
> @@ -89,5 +91,22 @@ extern int mpidr_to_cpu(unsigned long mpidr);
> extern void start_usr(void (*func)(void *arg), void *arg, unsigned long
> sp_usr);
> extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> + u64 vct;
> + isb();
> + asm volatile("mrs %0, cntvct_el0" : "=r" (vct));
> + return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> + while (msecs--)
> + udelay(1000);
> +}
> +
> #endif /* !__ASSEMBLY__ */
> #endif /* _ASMARM64_PROCESSOR_H_ */
> diff --git a/lib/arm64/processor.c b/lib/arm64/processor.c
> index deeab4ec9c8ac..50fa835c6f1e3 100644
> --- a/lib/arm64/processor.c
> +++ b/lib/arm64/processor.c
> @@ -9,6 +9,7 @@
> #include <asm/ptrace.h>
> #include <asm/processor.h>
> #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
> static const char *vector_names[] = {
> "el1t_sync",
> @@ -253,3 +254,17 @@ bool is_user(void)
> {
> return current_thread_info()->flags & TIF_USER_MODE;
> }
> +
> +void delay(u64 cycles)
> +{
> + u64 start = get_cntvct();
> + while ((get_cntvct() - start) < cycles)
> + cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> + unsigned int frq;
> + asm volatile("mrs %0, cntfrq_el0" : "=r" (frq));
> + delay((u64)usec * frq / 1000000);
> +}
--
Alex Bennée
- Re: [Qemu-arm] [kvm-unit-tests PATCH v2 01/10] lib: xstr: allow multiple args, (continued)
[Qemu-arm] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support more than 8 cpus, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines, Andrew Jones, 2016/06/04
- Re: [Qemu-arm] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines,
Alex Bennée <=
[Qemu-arm] [kvm-unit-tests PATCH v2 06/10] arm/arm64: add initial gicv2 support, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 05/10] arm/arm64: irq enable/disable, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 10/10] arm/arm64: gic: don't just use zero, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 07/10] arm/arm64: add initial gicv3 support, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 09/10] arm/arm64: gicv3: add an IPI test, Andrew Jones, 2016/06/04
[Qemu-arm] [kvm-unit-tests PATCH v2 08/10] arm/arm64: gicv2: add an IPI test, Andrew Jones, 2016/06/04
Re: [Qemu-arm] [kvm-unit-tests PATCH v2 00/10] arm/arm64: add gic framework, Alex Bennée, 2016/06/04