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Re: [Qemu-arm] [PATCH 0/5] ast2400: some cleanups and a simple memory co
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-arm] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model |
Date: |
Tue, 12 Jul 2016 18:20:00 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.1.0 |
Hello Peter,
On 07/12/2016 04:19 PM, Peter Maydell wrote:
> On 8 July 2016 at 17:06, Cédric Le Goater <address@hidden> wrote:
>> Hello,
>>
>> Here are a couple of cleanups and a very basic memory controller model
>> providing a configuration register. This is needed to determine the
>> RAM size of the SOC, only used by U-Boot as of today.
>>
>> Ultimately, we would want to add more support for U-Boot and be able
>> to boot from flash 0 but the device model of the m25p80 object is not
>> designed to use a memory region. And so, it is difficult to define a
>> rom device for the flash backend.
>>
>> Some initial patches were proposed but they are not being friendly
>> with the object interface. Work in progress.
>
> Hi; the release process is now at the point where I wouldn't really
> want to put this into 2.7; I can be persuaded if you have a solid
> justification, though.
Here is my take to it :
* 1/5 hw/misc: fix typo in Aspeed SCU hw-strap2 property name
That's a minor fix
* 2/5 ast2400: replace aspeed_smc_is_implemented()
That is not a fix but it removes some ugliness in the code, which
you had noticed, and which prevents us from fixing possible issues
nicely. So this is a preventive cleanup :)
* 3/5 ast2400: pretend DMAs are done for U-boot
This is a work around fix. U-boot[1] uses DMAs to calibrate the
SPI flash module. It will spin until the DMA transfers are done.
* 4/5 ast2400: externalize revision numbers
This is minor fix de-duplicating code and a prereq for the next
patch.
* 5/5 ast2400: add a memory controller device model
That's an enhancement. It adds a basic device model for the memory
controller. This is needed by some version of the SDK relying on
the configuration register to know how much RAM the SOC has. Older
versions used a hardcoded value.
The first patches should not be too much of a problem regarding the
soft freeze. The last can wait 2.8 if you prefer, we need more work
to fully support u-boot anyhow. I would be happy to have review
though :) The model is very much like the SCU.
Thanks,
C.
[1] not supported yet in qemu because of the lack of a rom device
memory region needed to boot from the flash module.
- [Qemu-arm] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model, Cédric Le Goater, 2016/07/08
- [Qemu-arm] [PATCH 1/5] hw/misc: fix typo in Aspeed SCU hw-strap2 property name, Cédric Le Goater, 2016/07/08
- [Qemu-arm] [PATCH 2/5] ast2400: replace aspeed_smc_is_implemented(), Cédric Le Goater, 2016/07/08
- [Qemu-arm] [PATCH 3/5] ast2400: pretend DMAs are done for U-boot, Cédric Le Goater, 2016/07/08
- [Qemu-arm] [PATCH 4/5] ast2400: externalize revision numbers, Cédric Le Goater, 2016/07/08
- [Qemu-arm] [PATCH 5/5] ast2400: add a memory controller device model, Cédric Le Goater, 2016/07/08
- Re: [Qemu-arm] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model, Peter Maydell, 2016/07/12
- Re: [Qemu-arm] [PATCH 0/5] ast2400: some cleanups and a simple memory controller model,
Cédric Le Goater <=