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[Qemu-arm] ARMV7M MPU experience


From: Roman Kostin
Subject: [Qemu-arm] ARMV7M MPU experience
Date: Sun, 7 Aug 2016 19:03:14 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0

I am looking for working MPU inplementation for Cortex-M MCUs.

Tried the tree I pulled off https://github.com/mdavidsaver/qemu.git and couldn't get it to work as expected. Can anyone share their experience with this code?

My code is put into ROM adress @ 0x00000000:

vtable:
    .word    istack
    .word    reset
    .word    hndlr008
    ...
    .word    hndlr1dc

hndlr008:
    ...

reset:
        ldr     r0, =mpu
        ldr     r0, [r0]
        movs    r1, #2    // Rgn #2
        str     r1, [r0, #8]
        ldr     r1, =bar
        ldr     r1, [r1]
        str     r1, [r0, #0xc]
        ldr     r1, =rasr
        ldr     r1, [r1]
        str     r1, [r0, #0x10]
        movs    r1, #1    // Turn MPU on
f1:     str     r1, [r0, #4]
        ldr     r1, =bar
        ldr     r1, [r1]
        ldr     r1, [r1]
        b       reset

mpu:    .word   0xe000ed90
bar:    .word   0x20000000
rasr:   .word   0x13080029

I'm trying to set up region #2 starting from address 0x20000000 (SRAM). But as soon as MPU is turned on, the very next memory access @ label f1 crashes qemu after a hang of ~60 sec. This is the output:

qemu: hardware error: ssys_read: Bad offset 0xffc

CPU #0:
R00=e000ed90 R01=00000001 R02=00000000 R03=00000000
R04=00000000 R05=00000000 R06=00000000 R07=00000000
R08=00000000 R09=00000000 R10=00000000 R11=00000000
R12=00000000 R13=43fdfffc R14=fffffff1 R15=000001e8
PSR=00000173 ---- T svc32
FPSCR: 00000000
Aborted (core dumped)

Any insight?

Thank you!

--
Roman Kostin


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