qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-arm] [PATCH v2] timer: a9gtimer: check auto-increment register


From: P J P
Subject: Re: [Qemu-arm] [PATCH v2] timer: a9gtimer: check auto-increment register value
Date: Mon, 3 Oct 2016 14:43:33 +0530 (IST)

  Hello Peter,

+-- On Sun, 2 Oct 2016, Peter Maydell wrote --+
| The timer can't autoincrement by more than a 32 bit value, but
| the timer value is 64 bits, and since this code may be doing more than
| one autoincrement it's better to use 64 bits.

  Okay.

| If in doubt, you need to check the datasheet/technical reference manual for 
| the hardware, in this case 
| 
http://infocenter.arm.com/help/topic/com.arm.doc.100486_0401_10_en/ada1443777319205.html
 
| Zero is a valid value for the auto-increment register, and in fact it is the 
| documented reset value.

  Yes, I was following the same. It does mention zero as a valid reset value, 
but does not mention about value to be writen to Timer Load Register. As in, 
when user attempts to write to a register. 
 
| gtb->status should be set whenever the timer comparator
| fires, whether we are auto-incrementing or not, and
| whatever the value of the auto-increment register is.
| It is the "timer matched" interrupt output. (Your current
| patch is wrong in that it has moved setting gtb->status
| into the wrong place, as I mentioned above.)

  Done; I've sent a revised patch v3.

Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
47AF CE69 3A90 54AA 9045 1053 DD13 3D32 FE5B 041F



reply via email to

[Prev in Thread] Current Thread [Next in Thread]