Re: [Qemu-arm] [Qemu-devel] [PATCH 00/23] arm: Add virtualization to GICv3, and enable EL2 on 64-bit CPUs

[Peter Maydell]

On 19 December 2016 at 22:20, Alistair Francis <address@hidden> wrote:
> If I manually enable EL2 and EL3 for the Xilinx EP108 board I can
> replicate a full hardware flow from ATF -> u-boot -> Linux.
>
> Unfortunately Linux doesn't get too far as I get the error below. This
> is further then it was getting before though, so I'm still including
> this:
>
> Tested-by: Alistair Francis <address@hidden>
>
> [       24547.770] Detected VIPT I-cache on CPU1
> [       24667.370] CPU features: SANITY CHECK: Unexpected variation in
> SYS_CNTFRQ_EL0. Boot CPU: 0x00000005f5e100, CPU1: 0x00000003b9aca0
> [       24769.210] Unsupported CPU feature variation.

I'm not sure what's going on here -- in a full-EL3 setup then
we should be using the ATF PSCI implementation and it's the
firmware's job to ensure that SYS_CNTFRQ_EL0 is the same on
the booted up CPU (by pulling it out of the memory mapped system
timer, usually). On reset the CPUs will all have the same
CNTFRQ_EL0 value so unless EL3 firmware is writing dodgy values
to it they shouldn't end up out of sync. Might also be worth
checking we're not accidentally trying to use QEMU's PSCI
implementation.

I suspect this will be easier for you to investigate than me --
is this related to the system timer implementation you sent
patches for?

thanks
-- PMM