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Re: [Qemu-arm] [PATCH v2 0/2] Aspeed watchdog controller model
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v2 0/2] Aspeed watchdog controller model |
Date: |
Fri, 3 Feb 2017 12:49:05 +0000 |
On 26 January 2017 at 17:37, Cédric Le Goater <address@hidden> wrote:
> Hello,
>
> The Aspeed SoC includes a set of watchdog timers using 32-bit
> decrement counters. This patchset provides a model for this controller
> and adds the first watchdog to the Aspeed SoC model. A second watchdog
> exists and is used on real HW to boot from a second flash module
> containing a golden image of the firmware. This is not supported yet
> in qemu.
>
> The main benefit today of this model is to enables reboot/reset of a
> guest from U-Boot and Linux.
>
> Thanks,
>
> C.
>
> Cédric Le Goater (2):
> wdt: Add Aspeed watchdog device model
> aspeed: add a watchdog controller
Applied to target-arm.next, thanks.
-- PMM
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