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Re: [Qemu-arm] [PATCH] target/aarch64: exit to main loop after handling


From: Alex Bennée
Subject: Re: [Qemu-arm] [PATCH] target/aarch64: exit to main loop after handling MSR
Date: Wed, 14 Jun 2017 13:35:35 +0100
User-agent: mu4e 0.9.19; emacs 25.2.50.3

Paolo Bonzini <address@hidden> writes:

> On 14/06/2017 14:14, Alex Bennée wrote:
>>> Then Emilio's patch, if a bit of a heavy hammer, is correct. After
>>> aa64_daif_write needs you need an exit_tb so that arm_cpu_exec_interrupt
>>> is executed again.
>>
>> This is a case of cpu->interrupt_request being pending but not having
>> set cpu->icount_decr yet to signal the exit.
>
> Rather than "yet", "anymore".  So far it has always been an invariant
> that anything that re-enabled an interrupt had to do exit_tb.
>
>> Wouldn't another approach
>> (that didn't involve futzing with each front-end) to be to check
>> cpu->interrupt_request and force the exit in lookup_tb_ptr?
>
> That would cause an unnecessary slowdown in code that runs with
> interrupts disabled but does a lot of indirect jumps...  ppc's SLOF
> firmware probably qualifies.

Really? I'd have to measure the change it makes. Is there a benchmark
stanza for measuring the PPC slof firmware time?

I have 3 patches now which all fix the same thing so we can pick and
choose which we should apply. Patches incoming...

--
Alex Bennée



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