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[Qemu-arm] [PATCH for-2.10] target/arm: Correct MPU trace handling of wr
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH for-2.10] target/arm: Correct MPU trace handling of write vs execute |
Date: |
Mon, 24 Jul 2017 15:33:12 +0100 |
Correct off-by-one bug in the PSMAv7 MPU tracing where it would print
a write access as "reading", an insn fetch as "writing", and a read
access as "execute".
Since we have an MMUAccessType enum now, we can make the code clearer
in the process by using that rather than the raw 0/1/2 values.
Signed-off-by: Peter Maydell <address@hidden>
---
We should update all this code to use the MMUAccessType type and
the enum values, but that's work for 2.11 (I'll put together a patch).
In the meantime, this is a bugfix for 2.10...
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4ed32c5..9ed5096 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8558,8 +8558,8 @@ static bool get_phys_addr(CPUARMState *env, target_ulong
address,
phys_ptr, prot, fsr);
qemu_log_mask(CPU_LOG_MMU, "PMSAv7 MPU lookup for %s at 0x%08" PRIx32
" mmu_idx %u -> %s (prot %c%c%c)\n",
- access_type == 1 ? "reading" :
- (access_type == 2 ? "writing" : "execute"),
+ access_type == MMU_DATA_LOAD ? "reading" :
+ (access_type == MMU_DATA_STORE ? "writing" : "execute"),
(uint32_t)address, mmu_idx,
ret ? "Miss" : "Hit",
*prot & PAGE_READ ? 'r' : '-',
--
2.7.4
- [Qemu-arm] [PATCH for-2.10] target/arm: Correct MPU trace handling of write vs execute,
Peter Maydell <=