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Re: [Qemu-arm] [Qemu-devel] [PATCH 14/20] target/arm: Make MPU_RNR regis
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 14/20] target/arm: Make MPU_RNR register banked for v8M |
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Date: |
Tue, 29 Aug 2017 09:09:27 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 |
On 08/29/2017 09:06 AM, Peter Maydell wrote:
> On 29 August 2017 at 17:05, Richard Henderson
> <address@hidden> wrote:
>> On 08/22/2017 08:08 AM, Peter Maydell wrote:
>>> + env->pmsav7.rnr[M_REG_NS] = 0;
>>> + env->pmsav7.rnr[M_REG_S] = 0;
>>> memset(env->pmsav8.mair0, 0, sizeof(env->pmsav8.mair0));
>>> memset(env->pmsav8.mair1, 0, sizeof(env->pmsav8.mair1));
>>
>> Why some memset and some by-element?
>
> Roughly, memset where I would otherwise have to write a
> for loop (ie where there's more than 2 elements).
There's only 2 elements of mair0 and mair1...
r~
- Re: [Qemu-arm] [Qemu-devel] [PATCH 05/20] target/arm: Add MMU indexes for secure v8M, (continued)
- [Qemu-arm] [PATCH 20/20] target/arm: Implement BXNS, and banked stack pointers, Peter Maydell, 2017/08/22
- [Qemu-arm] [PATCH 18/20] target/arm: Make CFSR register banked for v8M, Peter Maydell, 2017/08/22
- [Qemu-arm] [PATCH 03/20] target/arm: Add state field, feature bit and migration for v8M secure state, Peter Maydell, 2017/08/22
- [Qemu-arm] [PATCH 14/20] target/arm: Make MPU_RNR register banked for v8M, Peter Maydell, 2017/08/22