Re: [Qemu-arm] [Qemu-devel] [PATCH 16/20] target/arm: Make CCR register banked for v8M

[Peter Maydell]

On 29 August 2017 at 17:08, Richard Henderson
<address@hidden> wrote:
> On 08/22/2017 08:08 AM, Peter Maydell wrote:
>> +        if (attrs.secure) {
>> +            /* the BFHFNMIGN bit is not banked; keep that in the NS copy */
>> +            int new_bfhnmign = !!(value & R_V7M_CCR_BFHFNMIGN_MASK);
>> +
>> +            cpu->env.v7m.ccr[M_REG_NS] = 
>> deposit32(cpu->env.v7m.ccr[M_REG_NS],
>> +                                                    
>> R_V7M_CCR_BFHFNMIGN_SHIFT,
>> +                                                    
>> R_V7M_CCR_BFHFNMIGN_LENGTH,
>> +                                                    new_bfhnmign);
>> +            value &= ~R_V7M_CCR_BFHFNMIGN_MASK;
>> +        }
>
> No need to extract and then redeposit, just use the mask.
>
>     cpu->env.v7m.ccr[M_REG_NS] =
>       (cpu->env.v7m.ccr[M_REG_NS] & ~R_V7M_CCR_BFHFNMIGN_MASK)
>       | (value & R_V7M_CCR_BFHFNMIGN_MASK);

Mmm. This is one of the operations that deposit/extract aren't
too wonderful for. I don't generally like direct messing with
bit operations, I think they're harder to read, but there's not
much in it here so I'll go with your version.

thanks
-- PMM