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Re: [Qemu-arm] [Qemu-devel] [PATCH 20/20] nvic: Add missing code for wri
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit |
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Date: |
Thu, 5 Oct 2017 15:01:20 -0400 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 |
On 09/22/2017 11:00 AM, Peter Maydell wrote:
> When we added support for the new SHCSR bits in v8M in commit
> 437d59c17e9 the code to support writing to the new HARDFAULTPENDED
> bit was accidentally only added for non-secure writes; the
> secure banked version of the bit should also be writable.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/intc/armv7m_nvic.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Richard Henderson <address@hidden>
r~
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Richard Henderson <=