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Re: [Qemu-arm] [PATCH v14 2/9] ACPI: Add APEI GHES table generation and


From: Igor Mammedov
Subject: Re: [Qemu-arm] [PATCH v14 2/9] ACPI: Add APEI GHES table generation and CPER record support
Date: Wed, 3 Jan 2018 14:31:04 +0100

On Wed, 3 Jan 2018 10:21:06 +0800
gengdongjiu <address@hidden> wrote:

[...]   
> >   
> >> In order to simulation, we hard code the error
> >> type to Multi-bit ECC.  
> > Not sure what this is about, care to elaborate?  
> 
> please see Memory Error Record in [1], in which the "Memory Error Type" field 
> is used to describe the
> error type, such as  Multi-bit ECC or Parity Error etc. Because KVM or host 
> does not pass the memory
> error type to Qemu, so Qemu does not know what is the error type for the 
> memory section. Hence we let QEMU simulate
> the error type to Multi-bit ECC.
Agreed that in case of TCG qemu won't likely have any way to get hw error from 
kernel
so it could be useful only for testing purposes (i.e. 'make check' and/or 
testing
how guest OS handles errors)

But with KVM in kernel it should be possible to fish error out from host kernel
and forward it to guest. If this are intended for handling HW errors,
I'm not sure that 'Multi-bit ECC' could replace all real errors reported by host
firmware.


> [1]:
> UEFI Spec 2.6 Errata A:
> 
> "N.2.5 Memory Error Section"
> -----------------+---------------+--------------+-------------------------------------------+
>         Mnemonic |   Byte Offset |  Byte Length |        Description          
>               |
> -----------------+---------------+--------------+-------------------------------------------+
>         ........ |  ............ |  .........   |        ...........          
>               |
> -----------------+---------------+--------------+-------------------------------------------+
> Memory Error Type|     72        |       1      |Identifies the type of error 
> that occurred:|
>                |               |              | 0 – Unknown                   
>            |
>                |               |              | 1 – No error                  
>            |
>                |               |              | 2 – Single-bit ECC            
>            |
>                |               |              | 3 – Multi-bit ECC             
>            |
>                |               |              | 4 – Single-symbol ChipKill 
> ECC           |
>                |               |              | 5 – Multi-symbol ChipKill ECC 
>            |
>                |               |              | 6 – Master abort              
>             |
>                |               |              | 7 – Target abort              
>             |
>                |               |              | 8 – Parity Error              
>             |
>                |               |              | 9 – Watchdog timeout          
>             |
>                |               |              | 10 – Invalid address          
>             |
>                |               |              | 11 – Mirror Broken            
>             |
>                |               |              | 12 – Memory Sparing           
>             |
>                |               |              | 13 - Scrub corrected error    
>             |
>                |               |              | 14 - Scrub uncorrected error  
>             |
>                |               |              | 15 - Physical Memory Map-out 
> event        |
>                |               |              | All other values reserved.    
>             |
> -----------------+---------------+--------------+-------------------------------------------+
>         ........ |  ............ |  .........   |        ...........          
>               |
> -----------------+---------------+--------------+-------------------------------------------+
[...]



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