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[Qemu-arm] [PATCH v3 20/25] xtensa: cpu: add CPU_RESOLVING_TYPE macro


From: Igor Mammedov
Subject: [Qemu-arm] [PATCH v3 20/25] xtensa: cpu: add CPU_RESOLVING_TYPE macro
Date: Tue, 23 Jan 2018 09:08:19 +0100

it will be used for providing to cpu name resolving class for
parsing cpu model for system and user emulation code.

Along with change add target to null-machine test, so
that when switch to CPU_RESOLVING_TYPE happens,
test would ensure that null-mchine usecase still works.

Signed-off-by: Igor Mammedov <address@hidden>
---
CC: Max Filippov <address@hidden>
---
 target/xtensa/cpu.h       | 1 +
 tests/machine-none-test.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index d9404aa..23dbd45 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -500,6 +500,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr 
addr,
 
 #define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
 #define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
 
 #ifdef TARGET_WORDS_BIGENDIAN
 #define XTENSA_DEFAULT_CPU_MODEL "fsf"
diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c
index a8a499e..a1e9980 100644
--- a/tests/machine-none-test.c
+++ b/tests/machine-none-test.c
@@ -51,6 +51,8 @@ static struct arch2cpu cpus_map[] = {
     { "sparc64", "Fujitsu Sparc64" },
     { "tricore", "tc1796" },
     { "unicore32", "UniCore-II" },
+    { "xtensa", "dc233c" },
+    { "xtensaeb", "fsf" },
 };
 
 static const char *get_cpu_model_by_arch(const char *arch)
-- 
2.7.4




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