[Qemu-arm] ARM cortex-m3 instruction fetch misbehaves during do_v7m_exception_exit

[Rd Cheung]

I am emulating TI RTOS(Texas Instrument real time operating system) on a cortex-M3 device. I have made boot up code work, but I am currently stuck at exception handler.  

when the code return from exception handler it goes to:

0x1001c90e:  b401b402  strlt    fp, [r1], #-0x402

while it should be:

1001c90e:   B402                push       {r1}

1001c910:   B401                push       {r0}

I notice the TI RTOS return from an exception with PC with bit 0 set. But it should not be an issue of current qemu.

Can anyone give me some clue of where to look at? Or is there any work around method?

Thank you!

Ruide Zhang