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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 09/67] target/arm: Implement SVE I


From: Peter Maydell
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH v2 09/67] target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group
Date: Fri, 23 Feb 2018 11:35:27 +0000

On 17 February 2018 at 18:22, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/helper-sve.h    | 145 +++++++++++++++++++++++++++++++++
>  target/arm/sve_helper.c    | 196 
> ++++++++++++++++++++++++++++++++++++++++++++-
>  target/arm/translate-sve.c |  65 +++++++++++++++
>  target/arm/sve.decode      |  42 ++++++++++
>  4 files changed, 447 insertions(+), 1 deletion(-)
>

> @@ -105,7 +121,7 @@ LOGICAL_PPPP(sve_orn_pppp, DO_ORN)
>  LOGICAL_PPPP(sve_nor_pppp, DO_NOR)
>  LOGICAL_PPPP(sve_nand_pppp, DO_NAND)
>
> -#undef DO_ADD
> +#undef DO_AND

Should this be in a previous patch?

>  #undef DO_BIC
>  #undef DO_EOR
>  #undef DO_ORR

> diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
> index a9b6ae046d..116002792a 100644
> --- a/target/arm/translate-sve.c
> +++ b/target/arm/translate-sve.c
> @@ -211,6 +211,71 @@ static void trans_BIC_zzz(DisasContext *s, arg_BIC_zzz 
> *a, uint32_t insn)
>      do_vector3_z(s, tcg_gen_gvec_andc, 0, a->rd, a->rn, a->rm);
>  }
>
> +/*
> + *** SVE Integer Arithmetic - Binary Predicated Group
> + */
> +
> +static void do_zpzz_ool(DisasContext *s, arg_rprr_esz *a, gen_helper_gvec_4 
> *fn)
> +{
> +    unsigned vsz = vec_full_reg_size(s);
> +    if (fn == NULL) {
> +        unallocated_encoding(s);
> +        return;
> +    }

I think you do not want to be catching unallocated encodings
this late in the decode process. We have to identify all
the unallocated encodings before we do the "are SVE and
FP instructions supposed to trap" tests, because those don't
apply to unallocated encodings.

> +    tcg_gen_gvec_4_ool(vec_full_reg_offset(s, a->rd),
> +                       vec_full_reg_offset(s, a->rn),
> +                       vec_full_reg_offset(s, a->rm),
> +                       pred_full_reg_offset(s, a->pg),
> +                       vsz, vsz, 0, fn);
> +}

Rest of patch looks OK.

thanks
-- PMM



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