[Qemu-arm] [PATCH v4 4/4] target/arm: Add arm_gdb_set_sysreg() callback

[Abdallah Bouassida]

This is a callback to set the cp-regs registered by the dynamic XML.

Signed-off-by: Abdallah Bouassida <address@hidden>
---
>> Adding to that our customers may need this write access, our tool TRACE32®
>> needs this also in some particular cases. For example: temporary disabling 
>> MMU
>> to do a physical memory access.

> By clearing the SCTLR bit? That's a good example of a case that
> won't work reliably. If you clear the SCTLR.M bit via raw_write
> this will not perform the tlb_flush() that it needs to, which
> means that if anything does a memory access via the QEMU TLB
> it may get the wrong cached results. If you always clear the
> bit, do one gdb memory access then set the bit then it will
> probably not run into problems but you're walking on thin ice.

Does adding tlb_flush() before or after write_raw_cp_reg()
could solve the reliability issue for other particular cases?
Or is there any improvement that could be done for this write
callback in order to get more reliable results for other
particular cases?

 target/arm/helper.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 5929e0b..bb5a97c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -239,6 +239,20 @@ static int arm_gdb_get_sysreg(CPUARMState *env, uint8_t 
*buf, int reg)
 
 static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg)
 {
+    ARMCPU *cpu = arm_env_get_cpu(env);
+    const ARMCPRegInfo *ri;
+    uint32_t key;
+    uint32_t tmp;
+
+    tmp = ldl_p(buf);
+    key = cpu->dyn_xml.cpregs_keys[reg];
+    ri = get_arm_cp_reginfo(arm_env_get_cpu(env)->cp_regs, key);
+    if (ri) {
+        if (!(ri->type & ARM_CP_CONST)) {
+            write_raw_cp_reg(env, ri, tmp);
+            return cpreg_field_is_64bit(ri) ? 8 : 4;
+        }
+    }
     return 0;
 }
 
-- 
2.7.4