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Re: [Qemu-arm] [PATCH v2 00/13] iommu: support txattrs, support TCG exec
From: |
Peter Xu |
Subject: |
Re: [Qemu-arm] [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC |
Date: |
Tue, 5 Jun 2018 21:25:01 +0800 |
User-agent: |
Mutt/1.9.5 (2018-04-13) |
On Tue, Jun 05, 2018 at 10:13:12AM +0100, Peter Maydell wrote:
> On 5 June 2018 at 08:39, Peter Xu <address@hidden> wrote:
> > On Mon, Jun 04, 2018 at 04:29:28PM +0100, Peter Maydell wrote:
> >> Hi; this is v2 of my iommu patchset, which does:
> >> * support IOMMUs that are aware of memory transaction attributes and
> >> may generate different translations for different attributes
> >> * support TCG execution out of memory which is behind an IOMMU
> >> * implement the Arm TrustZone Memory Protection Controller
> >> (which needs both the above features in the IOMMU core code)
> >> * use the MPC in the mps2-an505 board
>
> > It seems that this series is still using the IOMMU index way. In case
> > I missed anything... Could you elaborate a bit on why this IOMMU index
> > solution is preferred comparing to the way to pass in MemTxAttrs? Or
> > was there any further discussion I missed on the topic?
> >
> > My last post to previous series is here:
> >
> > https://lists.gnu.org/archive/html/qemu-devel/2018-05/msg05702.html
> >
> > In that, I was still confused on why we couldn't use the existing
> > MemTxAttrs directly instead of the new IOMMU index (and I explained on
> > why that was prefered at least to me). I didn't see replies
> > afterwards.
>
> Broadly speaking I didn't think I had any further better
> explanation than I'd already given in that thread, eg here:
> https://lists.gnu.org/archive/html/qemu-devel/2018-05/msg05250.html
> and here:
> https://lists.gnu.org/archive/html/qemu-devel/2018-05/msg05513.html
>
> If you want to make a specific (detailed) counterproposal of a
> different API, I'm happy to look at whether that works for
> the use cases I care about and whether it's a nicer way to do it.
I posted a few pesudo code (ok, it can actually compile...) to show
what I meant. Please have a look there:
[RFC 0/3] memory: enhance IOMMU notifier to support USER bit
I very suspect I missed some important requirement there but I cannot
really figure it out myself. Hope these patches can either provide an
alternative solution on the problem, or help me to figure out what I
missed. Thanks,
--
Peter Xu
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 05/13] hw/misc/tz-mpc.c: Implement the Arm TrustZone Memory Protection Controller, (continued)
- [Qemu-arm] [PATCH v2 09/13] hw/core/or-irq: Support more than 16 inputs to an OR gate, Peter Maydell, 2018/06/04
- [Qemu-arm] [PATCH v2 13/13] hw/arm/mps2-tz.c: Instantiate MPCs, Peter Maydell, 2018/06/04
- [Qemu-arm] [PATCH v2 10/13] hw/misc/iotkit-secctl.c: Implement SECMPCINTSTATUS, Peter Maydell, 2018/06/04
- [Qemu-arm] [PATCH v2 11/13] hw/arm/iotkit: Instantiate MPC, Peter Maydell, 2018/06/04
- [Qemu-arm] [PATCH v2 12/13] hw/arm/iotkit: Wire up MPC interrupt lines, Peter Maydell, 2018/06/04
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC, no-reply, 2018/06/04
- Re: [Qemu-arm] [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC, Peter Xu, 2018/06/05
- Re: [Qemu-arm] [Qemu-devel] [PATCH v2 00/13] iommu: support txattrs, support TCG execution, implement TZ MPC, Peter Maydell, 2018/06/14