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From: | Peter Maydell |
Subject: | Re: [Qemu-arm] [PATCH v4 02/20] intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers |
Date: | Tue, 17 Jul 2018 15:15:24 +0100 |
On 14 July 2018 at 18:15, Luc Michel <address@hidden> wrote: > Implement GICD_ISACTIVERn and GICD_ICACTIVERn registers in the GICv2. > Those registers allow to set or clear the active state of an IRQ in the > distributor. > > Signed-off-by: Luc Michel <address@hidden> > --- > hw/intc/arm_gic.c | 61 +++++++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 57 insertions(+), 4 deletions(-) Reviewed-by: Peter Maydell <address@hidden> thanks -- PMM
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