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[Qemu-arm] [PATCH v9 07/14] target/arm: Define FIELDs for ID_DFR0
From: |
Aaron Lindsay |
Subject: |
[Qemu-arm] [PATCH v9 07/14] target/arm: Define FIELDs for ID_DFR0 |
Date: |
Wed, 5 Dec 2018 13:43:21 +0000 |
This is immediately necessary for the PMUv3 implementation to check
ID_DFR0.PerfMon to enable/disable specific features, but defines the
full complement of fields for possible future use elsewhere.
Signed-off-by: Aaron Lindsay <address@hidden>
---
target/arm/cpu.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 627e5c1995..304e6e47b3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1586,6 +1586,14 @@ FIELD(ID_AA64PFR0, GIC, 24, 4)
FIELD(ID_AA64PFR0, RAS, 28, 4)
FIELD(ID_AA64PFR0, SVE, 32, 4)
+FIELD(ID_DFR0, COPDBG, 0, 4)
+FIELD(ID_DFR0, COPSDBG, 4, 4)
+FIELD(ID_DFR0, MMAPDBG, 8, 4)
+FIELD(ID_DFR0, COPTRC, 12, 4)
+FIELD(ID_DFR0, MMAPTRC, 16, 4)
+FIELD(ID_DFR0, MPROFDBG, 20, 4)
+FIELD(ID_DFR0, PERFMON, 24, 4)
+
QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <=
R_V7M_CSSELR_INDEX_MASK);
/* If adding a feature bit which corresponds to a Linux ELF
--
2.19.1
- [Qemu-arm] [PATCH v9 00/14] More fully implement ARM PMUv3, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 01/14] migration: Add post_save function to VMStateDescription, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 03/14] target/arm: Swap PMU values before/after migrations, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 02/14] target/arm: Reorganize PMCCNTR accesses, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 04/14] target/arm: Filter cycle counter based on PMCCFILTR_EL0, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 05/14] target/arm: Allow AArch32 access for PMCCFILTR, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 07/14] target/arm: Define FIELDs for ID_DFR0,
Aaron Lindsay <=
- [Qemu-arm] [PATCH v9 06/14] target/arm: Implement PMOVSSET, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 09/14] target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 10/14] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER, Aaron Lindsay, 2018/12/05
- [Qemu-arm] [PATCH v9 08/14] target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23], Aaron Lindsay, 2018/12/05