Re: [PATCH v8 1/3] hw/misc: Implement STM32L4x5 EXTI

[Philippe Mathieu-Daudé]

On 9/1/24 17:06, Inès Varhol wrote:
> Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
> more than 32 event/interrupt requests and thus uses more registers
> than STM32F4xx EXTI which generates 23 event/interrupt requests.
>
> Acked-by: Alistair Francis <alistair.francis@wdc.com>
> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
> ---
>   docs/system/arm/b-l475e-iot01a.rst |   5 +-
>   hw/misc/Kconfig                    |   3 +
>   hw/misc/meson.build                |   1 +
>   hw/misc/stm32l4x5_exti.c           | 290 +++++++++++++++++++++++++++++
>   hw/misc/trace-events               |   5 +
>   include/hw/misc/stm32l4x5_exti.h   |  51 +++++
>   6 files changed, 352 insertions(+), 3 deletions(-)
>   create mode 100644 hw/misc/stm32l4x5_exti.c
>   create mode 100644 include/hw/misc/stm32l4x5_exti.h


> +static unsigned configurable_mask(unsigned bank)
> +{
> +     return valid_mask(bank) & ~exti_romask[bank];
> +}

Excellent, I'm glad of all the improvement you made over
the review process, great work!

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> +static void stm32l4x5_exti_write(void *opaque, hwaddr addr,
> +                                 uint64_t val64, unsigned int size)
> +{
> +    Stm32l4x5ExtiState *s = opaque;
> +    const unsigned bank = regbank_index_by_addr(addr);
> +
> +    trace_stm32l4x5_exti_write(addr, val64);
> +
> +    switch (addr) {
> +    case EXTI_IMR1:
> +    case EXTI_IMR2:
> +        s->imr[bank] = val64 & valid_mask(bank);
> +        return;
> +    case EXTI_EMR1:
> +    case EXTI_EMR2:
> +        s->emr[bank] = val64 & valid_mask(bank);
> +        return;
> +    case EXTI_RTSR1:
> +    case EXTI_RTSR2:
> +        s->rtsr[bank] = val64 & configurable_mask(bank);
> +        return;
> +    case EXTI_FTSR1:
> +    case EXTI_FTSR2:
> +        s->ftsr[bank] = val64 & configurable_mask(bank);
> +        return;
> +    case EXTI_SWIER1:
> +    case EXTI_SWIER2: {
> +        const uint32_t set = val64 & configurable_mask(bank);
> +        const uint32_t pend = set & ~s->swier[bank] & s->imr[bank] &
> +                              ~s->pr[bank];
> +        s->swier[bank] = set;
> +        s->pr[bank] |= pend;
> +        for (unsigned i = 0; i < irqs_per_bank[bank]; i++) {
> +            if (extract32(pend, i, 1)) {
> +                qemu_irq_pulse(s->irq[i + 32 * bank]);
> +            }
> +        }
> +        return;
> +    }

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