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Re: [PATCH 1/5] docs/system/arm/emulation.rst: Add missing implemented f


From: Peter Maydell
Subject: Re: [PATCH 1/5] docs/system/arm/emulation.rst: Add missing implemented features
Date: Fri, 19 Apr 2024 18:37:13 +0100

On Thu, 18 Apr 2024 at 16:20, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> As of version DDI0487K.a of the Arm ARM, some architectural features
> which previously didn't have official names have been named.  Add
> these to the list of features which QEMU's TCG emulation supports.
> Mostly these are features which we thought of as part of baseline 8.0
> support.  For SVE and SVE2, the names have been brought into line
> with the FEAT_* naming convention of other extensions, and some
> sub-components split into separate FEAT_ items.  In a few cases (eg
> FEAT_CCIDX, FEAT_DPB2) the omission from our list was just an oversight.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  docs/system/arm/emulation.rst | 37 +++++++++++++++++++++++++++++++++--
>  1 file changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
> index 2a7bbb82dc4..9388c7dd553 100644
> --- a/docs/system/arm/emulation.rst
> +++ b/docs/system/arm/emulation.rst
> @@ -8,13 +8,25 @@ Armv8 versions of the A-profile architecture. It also has 
> support for
>  the following architecture extensions:
>
>  - FEAT_AA32BF16 (AArch32 BFloat16 instructions)
> +- FEAT_AA32EL0 (Support for AArch32 at EL0)
> +- FEAT_AA32EL1 (Support for AArch32 at EL1)
> +- FEAT_AA32EL2 (Support for AArch32 at EL2)
> +- FEAT_AA32EL3 (Support for AArch32 at EL3)
>  - FEAT_AA32HPD (AArch32 hierarchical permission disables)
>  - FEAT_AA32I8MM (AArch32 Int8 matrix multiplication instructions)
> +- FEAT_AA64EL0 (Support for AArch64 at EL0)
> +- FEAT_AA64EL1 (Support for AArch64 at EL1)
> +- FEAT_AA64EL2 (Support for AArch64 at EL2)
> +- FEAT_AA64EL3 (Support for AArch64 at EL3)
> +- FEAT_AdvSIMD (Advanced SIMD Extension)
>  - FEAT_AES (AESD and AESE instructions)
> +- FEAT_ASID16 (16 bit ASID)
>  - FEAT_BBM at level 2 (Translation table break-before-make levels)
>  - FEAT_BF16 (AArch64 BFloat16 instructions)
>  - FEAT_BTI (Branch Target Identification)
> +- FEAT_CCIDX (Extended cache index)
>  - FEAT_CRC32 (CRC32 instructions)
> +- FEAT_Crypto (Cryptographic Extension)

I missed one here: we can also add
FEAT_Armv9_Crypto (Armv9 Cryptographic Extension)

(Like FEAT_Crypto, this is an "umbrella" feature naming the
combination of various other crypto related features, all of which
we already implement.)

-- PMM



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