Re: [PATCH v3 2/2] pcie: Specify 0 for ARI next function numbers

[Igor Mammedov]

On Sun,  2 Jul 2023 21:02:27 +0900
Akihiko Odaki <akihiko.odaki@daynix.com> wrote:

> The current implementers of ARI are all SR-IOV devices. The ARI next
> function number field is undefined for VF. The PF should end the linked
> list formed with the field by specifying 0.

this should also describe compat behavior changes.


> Fixes: 2503461691 ("pcie: Add some SR/IOV API documentation in 
> docs/pcie_sriov.txt")
> Fixes: 44c2c09488 ("hw/nvme: Add support for SR-IOV")
> Fixes: 3a977deebe ("Intrdocue igb device emulation")
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
>  include/hw/pci/pci.h | 2 ++
>  hw/core/machine.c    | 1 +
>  hw/pci/pci.c         | 2 ++
>  hw/pci/pcie.c        | 2 +-
>  4 files changed, 6 insertions(+), 1 deletion(-)
> 

>  GlobalProperty hw_compat_8_0[] = {
>      { "migration", "multifd-flush-after-each-section", "on"},
> +    { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" },
>  };

[...]

> +    DEFINE_PROP_BIT("x-pcie-ari-nextfn-1", PCIDevice, cap_present,
> +                    QEMU_PCIE_ARI_NEXTFN_1_BITNR, true),

now, I'm confused a bit. So above line says that default
x-pcie-ari-nextfn-1=on

then compat also sets it to 'on', so question is why do
we have compat entry at all?
If default state doesn't change why do we need involve compat
machinery and add "x-pcie-ari-nextfn-1" property?

>      DEFINE_PROP_END_OF_LIST()
>  };
>  
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 9a3f6430e8..cf09e03a10 100644
> --- a/hw/pci/pcie.c
> +++ b/hw/pci/pcie.c
> @@ -1030,7 +1030,7 @@ void pcie_sync_bridge_lnk(PCIDevice *bridge_dev)
>  /* ARI */
>  void pcie_ari_init(PCIDevice *dev, uint16_t offset)
>  {
> -    uint16_t nextfn = 1;
> +    uint16_t nextfn = dev->cap_present & QEMU_PCIE_ARI_NEXTFN_1 ? 1 : 0;
>  
>      pcie_add_capability(dev, PCI_EXT_CAP_ID_ARI, PCI_ARI_VER,
>                          offset, PCI_ARI_SIZEOF);