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[Qemu-commits] [COMMIT f407823] target-ppc: enable PPC_MFTB for 44x
From: |
Anthony Liguori |
Subject: |
[Qemu-commits] [COMMIT f407823] target-ppc: enable PPC_MFTB for 44x |
Date: |
Mon, 13 Jul 2009 00:01:59 -0000 |
From: Baojun Wang <address@hidden>
According to PPC440 user manual, PPC 440 supports ``mftb'' even it's a
preserved instruction:
PPC440_UM2013.pdf, p.445, table A-3
when I compile a kernel (2.6.30, bamboo_defconfig/440EP &
canyonlands/460EX), I can see ``mftb'' by using ppc-xxx-objdump
vmlinux
I have also checked the ppc 440x[456], 460S, 464, they also should support mftb.
The following patch enable mftb for all ppc 440 variants, including:
440EP, 440GP, 440x4, 440x5 and 460
Signed-off-by: Baojun Wang <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 04225e5..96ba2e5 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3381,7 +3381,7 @@ static void init_proc_405 (CPUPPCState *env)
PPC_DCR | PPC_WRTEE | PPC_RFMCI | \
PPC_CACHE | PPC_CACHE_ICBI | \
PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
- PPC_MEM_TLBSYNC | \
+ PPC_MEM_TLBSYNC | PPC_MFTB | \
PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
PPC_440_SPEC)
#define POWERPC_MSRM_440EP (0x000000000006D630ULL)
@@ -3461,7 +3461,7 @@ static void init_proc_440EP (CPUPPCState *env)
PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_MFAPIDI | \
PPC_CACHE | PPC_CACHE_ICBI | \
PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
- PPC_MEM_TLBSYNC | PPC_TLBIVA | \
+ PPC_MEM_TLBSYNC | PPC_TLBIVA | PPC_MFTB | \
PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
PPC_440_SPEC)
#define POWERPC_MSRM_440GP (0x000000000006FF30ULL)
@@ -3523,7 +3523,7 @@ static void init_proc_440GP (CPUPPCState *env)
PPC_DCR | PPC_WRTEE | \
PPC_CACHE | PPC_CACHE_ICBI | \
PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
- PPC_MEM_TLBSYNC | \
+ PPC_MEM_TLBSYNC | PPC_MFTB | \
PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
PPC_440_SPEC)
#define POWERPC_MSRM_440x4 (0x000000000006FF30ULL)
@@ -3585,7 +3585,7 @@ static void init_proc_440x4 (CPUPPCState *env)
PPC_DCR | PPC_WRTEE | PPC_RFMCI | \
PPC_CACHE | PPC_CACHE_ICBI | \
PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
- PPC_MEM_TLBSYNC | \
+ PPC_MEM_TLBSYNC | PPC_MFTB | \
PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
PPC_440_SPEC)
#define POWERPC_MSRM_440x5 (0x000000000006FF30ULL)
@@ -3663,7 +3663,7 @@ static void init_proc_440x5 (CPUPPCState *env)
/* PowerPC 460 (guessed) */
#define POWERPC_INSNS_460 (PPC_INSNS_BASE | PPC_STRING | \
PPC_DCR | PPC_DCRX | PPC_DCRUX | \
- PPC_WRTEE | PPC_MFAPIDI | \
+ PPC_WRTEE | PPC_MFAPIDI | PPC_MFTB | \
PPC_CACHE | PPC_CACHE_ICBI | \
PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
PPC_MEM_TLBSYNC | PPC_TLBIVA | \
@@ -3750,7 +3750,7 @@ static void init_proc_460 (CPUPPCState *env)
#define POWERPC_INSNS_460F (PPC_INSNS_BASE | PPC_STRING | \
PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | \
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
- PPC_FLOAT_STFIWX | \
+ PPC_FLOAT_STFIWX | PPC_MFTB | \
PPC_DCR | PPC_DCRX | PPC_DCRUX | \
PPC_WRTEE | PPC_MFAPIDI | \
PPC_CACHE | PPC_CACHE_ICBI | \
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