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[Qemu-commits] [qemu/qemu] 7fc645: tcg/arm: Factor out code to emit imme
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[Qemu-commits] [qemu/qemu] 7fc645: tcg/arm: Factor out code to emit immediate or reg-... |
Date: |
Tue, 16 Oct 2012 16:30:08 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 7fc645bf7a313d75904f8901f4e231008e79999a
https://github.com/qemu/qemu/commit/7fc645bf7a313d75904f8901f4e231008e79999a
Author: Peter Maydell <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/arm/tcg-target.c
Log Message:
-----------
tcg/arm: Factor out code to emit immediate or reg-reg op
The code to emit either an immediate cmp or a register cmp insn is
duplicated in several places; factor it out into its own function.
Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 4a1d241e3cc0a0cacb5de9084a4edb543d529d51
https://github.com/qemu/qemu/commit/4a1d241e3cc0a0cacb5de9084a4edb543d529d51
Author: Peter Maydell <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/arm/tcg-target.c
M tcg/arm/tcg-target.h
Log Message:
-----------
tcg/arm: Implement movcond_i32
Implement movcond_i32 for ARM, as the sequence
mov dst, v2 (implicitly done by the tcg common code)
cmp c1, c2
movCC dst, v1
Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: da897bf5ae2d0276dcabe941ba3a402aa718b740
https://github.com/qemu/qemu/commit/da897bf5ae2d0276dcabe941ba3a402aa718b740
Author: Blue Swirl <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/ia64/tcg-target.c
Log Message:
-----------
tcg/ia64: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCG temps.
Signed-off-by: Blue Swirl <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: b90cf716928d7934f4c1392f9097247a84b295d2
https://github.com/qemu/qemu/commit/b90cf716928d7934f4c1392f9097247a84b295d2
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/ia64/tcg-target.c
M tcg/ia64/tcg-target.h
Log Message:
-----------
tcg/ia64: implement movcond_i32/64
Implement movcond_i32/64 on ia64 hosts. It is not possible to have
immediate compare arguments without adding a new bundle, but it is
possible to have 22-bit immediate value arguments.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 2174d1e1ff3522f6f64260bad460185b7ca5bd26
https://github.com/qemu/qemu/commit/2174d1e1ff3522f6f64260bad460185b7ca5bd26
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/ia64/tcg-target.c
Log Message:
-----------
tcg/ia64: remove suboptimal register shifting in qemu_ld/st ops
Remove suboptimal register shifting in qemu_ld/st ops, introduced at the
CONFIG_TCG_PASS_AREG0 time.
As mem_idx is now loaded in register R58/R59 for the slow path, we have
to make sure to do it last, to not add additional register constraints.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: 63975ea7dfb3ec258433c782c2455bf64fab5e49
https://github.com/qemu/qemu/commit/63975ea7dfb3ec258433c782c2455bf64fab5e49
Author: Aurelien Jarno <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/ia64/tcg-target.c
Log Message:
-----------
tcg/ia64: slightly optimize TLB access code
It is possible to slightly optimize the TLB access code, by replacing
the movi + and instructions by a deposit instruction.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Commit: c7d4475a701c61f964a593d6fe81a8ea7a33add7
https://github.com/qemu/qemu/commit/c7d4475a701c61f964a593d6fe81a8ea7a33add7
Author: Richard Henderson <address@hidden>
Date: 2012-10-16 (Tue, 16 Oct 2012)
Changed paths:
M tcg/ia64/tcg-target.c
M tcg/ia64/tcg-target.h
Log Message:
-----------
tcg-ia64: Implement deposit
Note that in the general reg=reg,reg case we're restricted
to 16-bit insertions. This makes it easy to allow "any"
constant as input, as post-truncation it will fit into the
constant load insn for which we have room in the bundle.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Compare: https://github.com/qemu/qemu/compare/8b4a3df8081f...c7d4475a701c
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