[Qemu-commits] [qemu/qemu] 030c58: target-tricore: Cleanup and Bugfixes

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 030c58dfb7d2e73f23dc324516d641c5e585af2e
      
https://github.com/qemu/qemu/commit/030c58dfb7d2e73f23dc324516d641c5e585af2e
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-10-20 (Mon, 20 Oct 2014)

  Changed paths:
    M target-tricore/op_helper.c
    M target-tricore/tricore-opcodes.h

  Log Message:
  -----------
  target-tricore: Cleanup and Bugfixes

Move FCX loading of save_context_ to caller functions, for STLCX, STUCX insn to 
use those functions.
Move FCX storing of restore_context_ to caller functions, for LDLCX, LDUCX insn 
to use those functions.
Remove do_raise_exception function, which caused clang to emit a warning.
Fix: save_context_lower now saves a[11] instead of PSW.
Fix: MASK_OP_ABSB_BPOS starting at wrong offset.

Signed-off-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 59543d4ee1cef54dd1af7cae211f3e95e7287ba4
      
https://github.com/qemu/qemu/commit/59543d4ee1cef54dd1af7cae211f3e95e7287ba4
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-10-20 (Mon, 20 Oct 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of ABS, ABSB opcode format

Add instructions of ABS, ABSB opcode format.
Add microcode generator functions for ld/st of two 32bit reg as one 64bit value.
Add microcode generator functions for ldmst and swap.
Add helper ldlcx, lducx, stlcx and stucx.

Signed-off-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: f718b0bbfac8c64d7c989000041be6275745989a
      
https://github.com/qemu/qemu/commit/f718b0bbfac8c64d7c989000041be6275745989a
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-10-20 (Mon, 20 Oct 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of B opcode format

Add instructions of B opcode format.

Signed-off-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: b74f2b5bb3b7b806a896c97386a597205055bb9e
      
https://github.com/qemu/qemu/commit/b74f2b5bb3b7b806a896c97386a597205055bb9e
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-10-20 (Mon, 20 Oct 2014)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: Add instructions of BIT opcode format

Add instructions of BIT opcode format.
Add microcode generator functions gen_bit_1/2op to do 1/2 bit operations on the 
last bit.

Signed-off-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 3a16ecb06355d0bfc8b547eba094ebaa44dce39f
      
https://github.com/qemu/qemu/commit/3a16ecb06355d0bfc8b547eba094ebaa44dce39f
  Author: Bastian Koppelmann <address@hidden>
  Date:   2014-10-20 (Mon, 20 Oct 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c
    M target-tricore/tricore-opcodes.h

  Log Message:
  -----------
  target-tricore: Add instructions of BO opcode format

Add instructions of BO opcode format.
Add microcode generator functions gen_swap, gen_ldmst.
Add microcode generator functions gen_st/ld_preincr, which write back the 
address after the memory access.
Add helper for circular and bit reverse addr mode calculation.
Add sign extended bitmask for BO_OFF10 field.

Signed-off-by: Bastian Koppelmann <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>


  Commit: 6de4e7fdf6c7c53bc3769a88b628ab7610bb6698
      
https://github.com/qemu/qemu/commit/6de4e7fdf6c7c53bc3769a88b628ab7610bb6698
  Author: Peter Maydell <address@hidden>
  Date:   2014-10-22 (Wed, 22 Oct 2014)

  Changed paths:
    M target-tricore/helper.h
    M target-tricore/op_helper.c
    M target-tricore/translate.c
    M target-tricore/tricore-opcodes.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20141021' 
into staging

TriCore ABS, ABSB, B, BIT, BO instructions added

# gpg: Signature made Tue 21 Oct 2014 17:47:32 BST using RSA key ID 6B69CA14
# gpg: Good signature from "Bastian Koppelmann <address@hidden>"

* remotes/bkoppelmann/tags/pull-tricore-20141021:
  target-tricore: Add instructions of BO opcode format
  target-tricore: Add instructions of BIT opcode format
  target-tricore: Add instructions of B opcode format
  target-tricore: Add instructions of ABS, ABSB opcode format
  target-tricore: Cleanup and Bugfixes

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/60b6381ffb4f...6de4e7fdf6c7