[Qemu-commits] [qemu/qemu] 30a0d7: target-tricore: Fix two helper functions (clang wa...

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  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 30a0d72f949fc46e54a180cf703e89b6d3df157d
      
https://github.com/qemu/qemu/commit/30a0d72f949fc46e54a180cf703e89b6d3df157d
  Author: Stefan Weil <address@hidden>
  Date:   2015-03-24 (Tue, 24 Mar 2015)

  Changed paths:
    M target-tricore/op_helper.c

  Log Message:
  -----------
  target-tricore: Fix two helper functions (clang warnings)

clang report:

target-tricore/op_helper.c:1247:24: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]
target-tricore/op_helper.c:1248:25: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]
target-tricore/op_helper.c:1249:19: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]
target-tricore/op_helper.c:1297:24: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]
target-tricore/op_helper.c:1298:25: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]
target-tricore/op_helper.c:1299:19: warning:
  taking the absolute value of unsigned type 'uint32_t' (aka 'unsigned int')
  has no effect [-Wabsolute-value]

Fix also the divisor which was taken from the wrong register
(thanks to Peter Maydell for this hint).

Cc: Bastian Koppelmann <address@hidden>
Signed-off-by: Stefan Weil <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Bastian Koppelmann <address@hidden>


  Commit: 2b9d09bb3c44de934de03864d56ddd8a38ed863a
      
https://github.com/qemu/qemu/commit/2b9d09bb3c44de934de03864d56ddd8a38ed863a
  Author: Bastian Koppelmann <address@hidden>
  Date:   2015-03-24 (Tue, 24 Mar 2015)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: fix DVINIT_HU/BU calculating overflow before result

dvinit_hu/bu for ISA v1.3 calculate the higher part of the result, that is 
needed
for the overflow bits, after calculating the overflow bits.

Signed-off-by: Bastian Koppelmann <address@hidden>


  Commit: 00e1754ff1f6294a29e08398a120663eac723216
      
https://github.com/qemu/qemu/commit/00e1754ff1f6294a29e08398a120663eac723216
  Author: Bastian Koppelmann <address@hidden>
  Date:   2015-03-24 (Tue, 24 Mar 2015)

  Changed paths:
    M target-tricore/translate.c

  Log Message:
  -----------
  target-tricore: fix RRPW_DEXTR using wrong reg

RRPW_DEXTR used r1 for the low part and r2 for the high part. It should be the
other way round. This also fixes that the result of the first shift was not
saved in a temp and could overwrite registers that were needed for the second
shift.

Signed-off-by: Bastian Koppelmann <address@hidden>


  Commit: f69c24e4584f2161f90ee7caba38728aa77f937f
      
https://github.com/qemu/qemu/commit/f69c24e4584f2161f90ee7caba38728aa77f937f
  Author: Bastian Koppelmann <address@hidden>
  Date:   2015-03-24 (Tue, 24 Mar 2015)

  Changed paths:
    M target-tricore/op_helper.c

  Log Message:
  -----------
  target-tricore: properly fix dvinit_b/h_13

The TriCore documentation was wrong on how to calculate ovf bits for those two
instructions, which I confirmed with real hardware (TC1796 chip). An ovf
actually happens, if the result (without remainder) does not fit into 8/16 bits.

Signed-off-by: Bastian Koppelmann <address@hidden>


  Commit: 549c4e49788bbb16bdac3fb5480a2177019899e2
      
https://github.com/qemu/qemu/commit/549c4e49788bbb16bdac3fb5480a2177019899e2
  Author: Peter Maydell <address@hidden>
  Date:   2015-03-24 (Tue, 24 Mar 2015)

  Changed paths:
    M target-tricore/op_helper.c
    M target-tricore/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20150324' 
into staging

TriCore bugfixes for 2.3-rc1

# gpg: Signature made Tue Mar 24 08:48:33 2015 GMT using RSA key ID 6B69CA14
# gpg: Good signature from "Bastian Koppelmann <address@hidden>"

* remotes/bkoppelmann/tags/pull-tricore-20150324:
  target-tricore: properly fix dvinit_b/h_13
  target-tricore: fix RRPW_DEXTR using wrong reg
  target-tricore: fix DVINIT_HU/BU calculating overflow before result
  target-tricore: Fix two helper functions (clang warnings)

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/362ca922eea0...549c4e49788b