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[Qemu-commits] [qemu/qemu] 8a1e52: target-m68k: Delay autoinc writeback
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GitHub |
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[Qemu-commits] [qemu/qemu] 8a1e52: target-m68k: Delay autoinc writeback |
Date: |
Wed, 28 Dec 2016 17:00:07 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 8a1e52b69d2cd1c633f3c473a213d575931bf46d
https://github.com/qemu/qemu/commit/8a1e52b69d2cd1c633f3c473a213d575931bf46d
Author: Richard Henderson <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: Delay autoinc writeback
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Commit: f84aab269ddab8509b77408b886e9071bf5c48fb
https://github.com/qemu/qemu/commit/f84aab269ddab8509b77408b886e9071bf5c48fb
Author: Richard Henderson <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: Split gen_lea and gen_ea
Provide gen_lea_mode and gen_ea_mode, where the mode can be
specified manually, rather than taken from the instruction.
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Commit: 817af1c72d227fd5759ef882bef61acee40679b1
https://github.com/qemu/qemu/commit/817af1c72d227fd5759ef882bef61acee40679b1
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add cmpm
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Commit: 8be95defd6ab10d2c9f986879a0afa82417cb8e5
https://github.com/qemu/qemu/commit/8be95defd6ab10d2c9f986879a0afa82417cb8e5
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add 64bit mull
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 0ccb9c1d8128a020720d5c6abf99a470742a1b94
https://github.com/qemu/qemu/commit/0ccb9c1d8128a020720d5c6abf99a470742a1b94
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M linux-user/main.c
M target/m68k/cpu.h
M target/m68k/helper.h
M target/m68k/op_helper.c
M target/m68k/qregs.def
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add 680x0 divu/divs variants
Update helper to set the throwing location in case of div-by-0.
Cleanup divX.w and add quad word variants of divX.l.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
[laurent: modified to clear Z on overflow, as found with risu]
Commit: fb5543d820018a46b713911e7653594be727ca98
https://github.com/qemu/qemu/commit/fb5543d820018a46b713911e7653594be727ca98
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add abcd/sbcd/nbcd
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 14f944063affbcc7bd6df42b060793dbfee8a822
https://github.com/qemu/qemu/commit/14f944063affbcc7bd6df42b060793dbfee8a822
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/helper.h
M target/m68k/op_helper.c
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add cas/cas2 ops
Implement CAS using cmpxchg.
Implement CAS2 using helper and either cmpxchg when
the 32bit addresses are consecutive, or with
parallel_cpus+cpu_loop_exit_atomic() otherwise.
Suggested-by: Richard Henderson <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 7b542eb96d7d5d9266a9c0425f05d49c8e6df2f9
https://github.com/qemu/qemu/commit/7b542eb96d7d5d9266a9c0425f05d49c8e6df2f9
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: Implement 680x0 movem
680x0 movem can load/store words and long words and can use more
addressing modes. Coldfire can only use long words with (Ax) and
(d16,Ax) addressing modes.
Signed-off-by: Laurent Vivier <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Commit: 72d2e4b6a437f11f97d3138f6b2ec177b78210c7
https://github.com/qemu/qemu/commit/72d2e4b6a437f11f97d3138f6b2ec177b78210c7
Author: Richard Henderson <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: Do not cpu_abort on undefined insns
Report this properly via exception and, importantly, allow
the disassembler the chance to tell us what insn is not handled.
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
Commit: 367790cce8e14131426f5190dfd7d1bdbf656e4d
https://github.com/qemu/qemu/commit/367790cce8e14131426f5190dfd7d1bdbf656e4d
Author: Richard Henderson <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/helper.c
M target/m68k/helper.h
M target/m68k/translate.c
Log Message:
-----------
target-m68k: Inline shifts
Also manage word and byte operands and fix the computation of
overflow in the case of M68000 arithmetic shifts.
Signed-off-by: Laurent Vivier <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Commit: 0194cf31cfc84516d10eca354146673150e10410
https://github.com/qemu/qemu/commit/0194cf31cfc84516d10eca354146673150e10410
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: add rol/ror/roxl/roxr instructions
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: 2b5e2170678af36df48ab4b05dff81fe40b41a65
https://github.com/qemu/qemu/commit/2b5e2170678af36df48ab4b05dff81fe40b41a65
Author: Laurent Vivier <address@hidden>
Date: 2016-12-27 (Tue, 27 Dec 2016)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target-m68k: free TCG variables that are not
This is a cleanup patch. It adds call to tcg_temp_free()
when it is missing.
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Commit: dbe2b65566e76d3c3a0c3358285c0336ac61e757
https://github.com/qemu/qemu/commit/dbe2b65566e76d3c3a0c3358285c0336ac61e757
Author: Peter Maydell <address@hidden>
Date: 2016-12-28 (Wed, 28 Dec 2016)
Changed paths:
M linux-user/main.c
M target/m68k/cpu.h
M target/m68k/helper.c
M target/m68k/helper.h
M target/m68k/op_helper.c
M target/m68k/qregs.def
M target/m68k/translate.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.9-pull-request'
into staging
# gpg: Signature made Tue 27 Dec 2016 17:52:12 GMT
# gpg: using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <address@hidden>"
# gpg: aka "Laurent Vivier <address@hidden>"
# gpg: aka "Laurent Vivier (Red Hat) <address@hidden>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier/tags/m68k-for-2.9-pull-request:
target-m68k: free TCG variables that are not
target-m68k: add rol/ror/roxl/roxr instructions
target-m68k: Inline shifts
target-m68k: Do not cpu_abort on undefined insns
target-m68k: Implement 680x0 movem
target-m68k: add cas/cas2 ops
target-m68k: add abcd/sbcd/nbcd
target-m68k: add 680x0 divu/divs variants
target-m68k: add 64bit mull
target-m68k: add cmpm
target-m68k: Split gen_lea and gen_ea
target-m68k: Delay autoinc writeback
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/0f72559fbc9e...dbe2b65566e7
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