[Qemu-commits] [qemu/qemu] 4df9ca: tcg/mips: reserve a register for the

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[Qemu-commits] [qemu/qemu] 4df9ca: tcg/mips: reserve a register for the

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 4df9ca: tcg/mips: reserve a register for the guest_base.
Date:	Thu, 20 Jul 2017 04:03:45 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 4df9cac57f5220c17d856292e90fce455f708421
      
https://github.com/qemu/qemu/commit/4df9cac57f5220c17d856292e90fce455f708421
  Author: Jiang Biao <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M tcg/mips/tcg-target.inc.c

  Log Message:
  -----------
  tcg/mips: reserve a register for the guest_base.

Reserve a register for the guest_base using ppc code for reference.
By doing so, we do not have to recompute it for every memory load.

Signed-off-by: Jiang Biao <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 810d5cad4087236236e00fd3046a16adf26e9060
      
https://github.com/qemu/qemu/commit/810d5cad4087236236e00fd3046a16adf26e9060
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M util/cacheinfo.c

  Log Message:
  -----------
  util/cacheinfo: Add missing include for ppc linux

This include was forgotten when splitting cacheinfo.c out of
tcg/ppc/tcg-target.inc.c (see commit b255b2c8).

For a Centos7 host, the include path

        <signal.h>
          <bits/sigcontext.h>
      <asm/sigcontext.h>
        <asm/elf.h>
   <asm/auxvec.h>

implicitly pulls in the desired AT_* defines.
Not so for Debian Jessie.

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 44368ac62dc5ba014b68b2c1a8ec6fedc3242a5d
      
https://github.com/qemu/qemu/commit/44368ac62dc5ba014b68b2c1a8ec6fedc3242a5d
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M include/exec/helper-tcg.h

  Log Message:
  -----------
  tcg: Expand glue macros before stringifying helper names

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 846b0c1b5a562cd4f5979d6624918f4f97462477
      
https://github.com/qemu/qemu/commit/846b0c1b5a562cd4f5979d6624918f4f97462477
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M .gitignore

  Log Message:
  -----------
  coccinelle: ignore ASTs pre-parsed cached C files

files generated using coccinelle tool: 'spatch --use-cache'

Reviewed-by: Eric Blake <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: d97dd988ecd67f4fd12a80a55f07c1817f19b002
      
https://github.com/qemu/qemu/commit/d97dd988ecd67f4fd12a80a55f07c1817f19b002
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    A scripts/coccinelle/tcg_gen_extract.cocci

  Log Message:
  -----------
  coccinelle: add a script to optimize tcg op using tcg_gen_extract()

The following thread was helpful while writing this script:

    https://github.com/coccinelle/coccinelle/issues/86

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: abb1066df313602ef0ca631126bd342d399d5359
      
https://github.com/qemu/qemu/commit/abb1066df313602ef0ca631126bd342d399d5359
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm: Optimize aarch64 rev16

It is much shorter to reverse all 4 half-words in parallel
than extract, reverse, and deposit each in turn.

Suggested-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 68cedf733ae32363ccf54f0b52c8a424d5ec98ed
      
https://github.com/qemu/qemu/commit/68cedf733ae32363ccf54f0b52c8a424d5ec98ed
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: optimize aarch32 rev16

Use the same mask to avoid having to load two different constants, as
suggested by Richard Henderson.

Signed-off-by: Aurelien Jarno <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0d9acef24062844b96c671b4379d9fb03c3ea606
      
https://github.com/qemu/qemu/commit/0d9acef24062844b96c671b4379d9fb03c3ea606
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: optimize bcd_flags() using extract op

Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Acked-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e2622073e014b65e87134a3b32117ab170e91445
      
https://github.com/qemu/qemu/commit/e2622073e014b65e87134a3b32117ab170e91445
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/ppc/translate.c
    M target/ppc/translate/vsx-impl.inc.c

  Log Message:
  -----------
  target/ppc: optimize various functions using extract op

Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0b1183e315cce99102898bda54f69b685157a507
      
https://github.com/qemu/qemu/commit/0b1183e315cce99102898bda54f69b685157a507
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/sparc/translate.c

  Log Message:
  -----------
  target/sparc: optimize various functions using extract op

Done with the Coccinelle semantic patch
scripts/coccinelle/tcg_gen_extract.cocci.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 08d64e0db02e826b063d2b0d8b84f1cb1f7306c9
      
https://github.com/qemu/qemu/commit/08d64e0db02e826b063d2b0d8b84f1cb1f7306c9
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/sparc/translate.c

  Log Message:
  -----------
  target/sparc: optimize gen_op_mulscc() using deposit op

Suggested-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 729028a6e2816d64cb01cf4c1920686be90600da
      
https://github.com/qemu/qemu/commit/729028a6e2816d64cb01cf4c1920686be90600da
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M target/alpha/translate.c

  Log Message:
  -----------
  target/alpha: optimize gen_cvtlq() using deposit op

Suggested-by: Richard Henderson <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 797ed66d29909e9564b146a4a181005fc8096c69
      
https://github.com/qemu/qemu/commit/797ed66d29909e9564b146a4a181005fc8096c69
  Author: Philippe Mathieu-Daudé <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  tcg/tci: enable bswap16_i64

Altough correctly implemented, bswap16_i64() never got tested/executed so the
safety TODO() statement was never removed.

Since it got now tested the TODO() can be removed.

while running Alex Bennée's image aarch64-linux-3.15rc2-buildroot.img:

Trace 0x7fa1904b0890 [0: ffffffc00036cd04]
----------------
IN:
0xffffffc00036cd24:  5ac00694      rev16 w20, w20

OP:
 ---- ffffffc00036cd24 0000000000000000 0000000000000000
 ext32u_i64 tmp3,x20
 ext16u_i64 tmp2,tmp3
 bswap16_i64 x20,tmp2
 movi_i64 tmp4,$0x10
 shr_i64 tmp2,tmp3,tmp4
 ext16u_i64 tmp2,tmp2
 bswap16_i64 tmp2,tmp2
 deposit_i64 x20,x20,tmp2,$0x10,$0x10

Linking TBs 0x7fa1904b0890 [ffffffc00036cd04] index 0 -> 0x7fa1904b0aa0 
[ffffffc00036cd24]
Trace 0x7fa1904b0aa0 [0: ffffffc00036cd24]
TODO qemu/tci.c:1049: tcg_qemu_tb_exec()
qemu/tci.c:1049: tcg fatal error
Aborted

Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Jaroslaw Pelczar <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Eric Blake <address@hidden>
Reviewed-by: Stefan Weil <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9c489ea6bed134fecfd556b439c68bba48fbe102
      
https://github.com/qemu/qemu/commit/9c489ea6bed134fecfd556b439c68bba48fbe102
  Author: Lluís Vilanova <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M accel/tcg/translate-all.c
    M include/exec/exec-all.h
    M target/alpha/translate.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h
    M target/cris/translate.c
    M target/hppa/translate.c
    M target/i386/translate.c
    M target/lm32/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/translate.c
    M target/moxie/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/s390x/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tilegx/translate.c
    M target/tricore/translate.c
    M target/unicore32/translate.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  tcg: Pass generic CPUState to gen_intermediate_code()

Needed to implement a target-agnostic gen_intermediate_code()
in the future.

Reviewed-by: David Gibson <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Benneé <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Lluís Vilanova <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 87a60ee84f8abfc26f200ceac86ef32a690b9e21
      
https://github.com/qemu/qemu/commit/87a60ee84f8abfc26f200ceac86ef32a690b9e21
  Author: Peter Maydell <address@hidden>
  Date:   2017-07-20 (Thu, 20 Jul 2017)

  Changed paths:
    M .gitignore
    M accel/tcg/translate-all.c
    M include/exec/exec-all.h
    M include/exec/helper-tcg.h
    A scripts/coccinelle/tcg_gen_extract.cocci
    M target/alpha/translate.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h
    M target/cris/translate.c
    M target/hppa/translate.c
    M target/i386/translate.c
    M target/lm32/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/translate.c
    M target/moxie/translate.c
    M target/nios2/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/ppc/translate/vsx-impl.inc.c
    M target/s390x/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tilegx/translate.c
    M target/tricore/translate.c
    M target/unicore32/translate.c
    M target/xtensa/translate.c
    M tcg/mips/tcg-target.inc.c
    M tcg/tci.c
    M util/cacheinfo.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170719' into staging

Queued tcg and tcg code gen related cleanups

# gpg: Signature made Thu 20 Jul 2017 00:32:00 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-tcg-20170719:
  tcg: Pass generic CPUState to gen_intermediate_code()
  tcg/tci: enable bswap16_i64
  target/alpha: optimize gen_cvtlq() using deposit op
  target/sparc: optimize gen_op_mulscc() using deposit op
  target/sparc: optimize various functions using extract op
  target/ppc: optimize various functions using extract op
  target/m68k: optimize bcd_flags() using extract op
  target/arm: optimize aarch32 rev16
  target/arm: Optimize aarch64 rev16
  coccinelle: add a script to optimize tcg op using tcg_gen_extract()
  coccinelle: ignore ASTs pre-parsed cached C files
  tcg: Expand glue macros before stringifying helper names
  util/cacheinfo: Add missing include for ppc linux
  tcg/mips: reserve a register for the guest_base.

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/04b33e218664...87a60ee84f8a
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