[Qemu-commits] [qemu/qemu] 7cd7b5: target-m68k: sync CC_OP before gen

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[Qemu-commits] [qemu/qemu] 7cd7b5: target-m68k: sync CC_OP before gen_jm

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 7cd7b5: target-m68k: sync CC_OP before gen_jmp_tb()
Date:	Mon, 08 Jan 2018 14:13:23 -0800
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 7cd7b5ca9be805e8a4ced4c07014c24e34812f27
      
https://github.com/qemu/qemu/commit/7cd7b5ca9be805e8a4ced4c07014c24e34812f27
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target-m68k: sync CC_OP before gen_jmp_tb()

And remove update_cc_op() from gen_exception() because there is
one in gen_jmp_im().

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 4131c242cc850aaf76e59d4c787d220f07850cf5
      
https://github.com/qemu/qemu/commit/4131c242cc850aaf76e59d4c787d220f07850cf5
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: fix gen_get_ccr()

As gen_helper_get_ccr() is able to compute CCR from cc_op and
flags, we don't need to flush flags before to call it.
flush_flags() and get_ccr() use COMPUTE_CCR() to compute
flags. get_ccr() computes CCR value,
whereas flush_flags update live cc_op and flags.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: ef59760b885ecca0d49df46f36bb6d34fbe9445a
      
https://github.com/qemu/qemu/commit/ef59760b885ecca0d49df46f36bb6d34fbe9445a
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user, m68k: correctly manage SR in context

Use cpu_m68k_get_ccr()/cpu_m68k_set_ccr() to setup and restore correctly
the value of SR in the context structure. Fix target_rt_setup_ucontext().

Fixes: 3219de458c ("linux-user: correctly manage SR in ucontext")
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 16a14cdf575a2eda4698930d22b75072537754dd
      
https://github.com/qemu/qemu/commit/16a14cdf575a2eda4698930d22b75072537754dd
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: use insn_pc to generate instruction fault address

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 5beb144e04f44772804ac8405b6a54a17fe78909
      
https://github.com/qemu/qemu/commit/5beb144e04f44772804ac8405b6a54a17fe78909
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: add CPU_LOG_INT trace

Display the interrupts/exceptions information
in QEMU logs (-d int)

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: d2f8fb8e7f8e7d082103d705e178c9f72e0bea77
      
https://github.com/qemu/qemu/commit/d2f8fb8e7f8e7d082103d705e178c9f72e0bea77
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/helper.c
    M target/m68k/op_helper.c

  Log Message:
  -----------
  target/m68k: manage 680x0 stack frames

680x0 manages several stack frame formats:
  - format 0: four-word stack frame
  - format 1: four-word throwaway stack frame
  - format 2: six-word stack frame
  - format 3: Floating-Point post-instruction stack frame
  - format 4: eight-word stack frame
  - format 7: access-error stack frame

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 8bf6cbaf396a8b54b138bb8a7c3377f2868ed16e
      
https://github.com/qemu/qemu/commit/8bf6cbaf396a8b54b138bb8a7c3377f2868ed16e
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M linux-user/main.c
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/helper.h
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add chk and chk2

chk and chk2 compare a value to boundaries, and
trigger a CHK exception if the value is out of bounds.

Signed-off-by: Laurent Vivier <address@hidden>
Suggested-by: Richard Henderson <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 9d4f0429f3dc1dc6c67de3eaa3106e6c1cfa1524
      
https://github.com/qemu/qemu/commit/9d4f0429f3dc1dc6c67de3eaa3106e6c1cfa1524
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add move16

move16 moves the source line to the destination line. Lines are aligned
to 16-byte boundaries and are 16 bytes long.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 6ad257641d60f8c4a47972af9027b1c9bb5af787
      
https://github.com/qemu/qemu/commit/6ad257641d60f8c4a47972af9027b1c9bb5af787
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: softmmu cleanup

don't compile supervisor only instructions in linux-user mode

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: f58ed1c50add3e76331afdc92387c0da9dd9e443
      
https://github.com/qemu/qemu/commit/f58ed1c50add3e76331afdc92387c0da9dd9e443
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add cpush/cinv

Add cache lines invalidate and cache lines push
as no-op operations, as we don't have cache.

These instructions are 68040 only.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d
      
https://github.com/qemu/qemu/commit/0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/helper.c
    M target/m68k/helper.h
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add reset

The instruction traps if the CPU is not in
Supervisor state but the helper is empty because
there is no easy way to reset all the peripherals
without resetting the CPU itself.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: fff3b4b0e16c76669e56173acb9d3cc6aac85e85
      
https://github.com/qemu/qemu/commit/fff3b4b0e16c76669e56173acb9d3cc6aac85e85
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: implement fsave/frestore

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 01490ea8f575656a9431fc0170a82bc6064fa2ef
      
https://github.com/qemu/qemu/commit/01490ea8f575656a9431fc0170a82bc6064fa2ef
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: move CCR/SR functions

The following patches will be clearer if we move
functions before adding new ones.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: b6a21d8d8f69ac04fd6180e752a65d582c07e948
      
https://github.com/qemu/qemu/commit/b6a21d8d8f69ac04fd6180e752a65d582c07e948
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add 680x0 "move to SR" instruction

Some cleanup, and allows SR to be moved from any addressing mode.
Previous code was wrong for coldfire: coldfire also allows to
use addressing mode to set SR/CCR. It only supports Data register
to get SR/CCR (move from)

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: b5ae1edc294f78865ede38377c0a9b92da4370e0
      
https://github.com/qemu/qemu/commit/b5ae1edc294f78865ede38377c0a9b92da4370e0
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add andi/ori/eori to SR/CCR

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 6e22b28e22aa6ed1b8db6f24da2633868019d4c9
      
https://github.com/qemu/qemu/commit/6e22b28e22aa6ed1b8db6f24da2633868019d4c9
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/gdbstub.c
    M target/m68k/helper.c
    M target/m68k/helper.h
    M target/m68k/monitor.c
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: add the Interrupt Stack Pointer

Add the third stack pointer, the Interrupt Stack Pointer (ISP)
(680x0 only). This stack will be needed in softmmu mode.

Update movec to set/get the value of the three stacks.

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: cc5230267678c26b7f96157086f45fd8a347eb21
      
https://github.com/qemu/qemu/commit/cc5230267678c26b7f96157086f45fd8a347eb21
  Author: Laurent Vivier <address@hidden>
  Date:   2018-01-04 (Thu, 04 Jan 2018)

  Changed paths:
    M target/m68k/cpu.h
    M target/m68k/translate.c

  Log Message:
  -----------
  target/m68k: fix m68k_cpu_dump_state()

Display correctly the Trace bits for 680x0
(2 bits instead of 1 for Coldfire).

Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>


  Commit: 232e5537e476c463f5e6e2e9ae31f6e2da9ebfe9
      
https://github.com/qemu/qemu/commit/232e5537e476c463f5e6e2e9ae31f6e2da9ebfe9
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-08 (Mon, 08 Jan 2018)

  Changed paths:
    M linux-user/main.c
    M linux-user/signal.c
    M target/m68k/cpu.c
    M target/m68k/cpu.h
    M target/m68k/gdbstub.c
    M target/m68k/helper.c
    M target/m68k/helper.h
    M target/m68k/monitor.c
    M target/m68k/op_helper.c
    M target/m68k/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.12-pull-request' 
into staging

# gpg: Signature made Thu 04 Jan 2018 16:37:32 GMT
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier <address@hidden>"
# gpg:                 aka "Laurent Vivier (Red Hat) <address@hidden>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-2.12-pull-request:
  target/m68k: fix m68k_cpu_dump_state()
  target/m68k: add the Interrupt Stack Pointer
  target/m68k: add andi/ori/eori to SR/CCR
  target/m68k: add 680x0 "move to SR" instruction
  target/m68k: move CCR/SR functions
  target/m68k: implement fsave/frestore
  target/m68k: add reset
  target/m68k: add cpush/cinv
  target/m68k: softmmu cleanup
  target/m68k: add move16
  target/m68k: add chk and chk2
  target/m68k: manage 680x0 stack frames
  target/m68k: add CPU_LOG_INT trace
  target/m68k: use insn_pc to generate instruction fault address
  linux-user, m68k: correctly manage SR in context
  target/m68k: fix gen_get_ccr()
  target-m68k: sync CC_OP before gen_jmp_tb()

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/4bd797af6f5b...232e5537e476
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