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[Qemu-commits] [qemu/qemu] df47ce: pc: add 2.12 machine types

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] df47ce: pc: add 2.12 machine types
Date: Thu, 18 Jan 2018 05:51:18 -0800 
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: df47ce8af4a5595b1f2088cf62bf33acbc3c7c32
      
https://github.com/qemu/qemu/commit/df47ce8af4a5595b1f2088cf62bf33acbc3c7c32
  Author: Haozhong Zhang <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  pc: add 2.12 machine types

Signed-off-by: Haozhong Zhang <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: c68bcb3a994a3647ea70899d050debb0ff72d86a
      
https://github.com/qemu/qemu/commit/c68bcb3a994a3647ea70899d050debb0ff72d86a
  Author: Haozhong Zhang <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M include/hw/i386/pc.h
    M target/i386/cpu.c

  Log Message:
  -----------
  target/i386: add clflushopt to "Skylake-Server" cpu model

CPUID_7_0_EBX_CLFLUSHOPT is missed in current "Skylake-Server" cpu
model. Add it to "Skylake-Server" cpu model on pc-i440fx-2.12 and
pc-q35-2.12. Keep it disabled in "Skylake-Server" cpu model on older
machine types.

Signed-off-by: Haozhong Zhang <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 807e9869b8c4119b81df902625af818519e01759
      
https://github.com/qemu/qemu/commit/807e9869b8c4119b81df902625af818519e01759
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  i386: Change X86CPUDefinition::model_id to const char*

It is valid to have a 48-character model ID on CPUID, however the
definition of X86CPUDefinition::model_id is char[48], which can
make the compiler drop the null terminator from the string.

If a CPU model happens to have 48 bytes on model_id, "-cpu help"
will print garbage and the object_property_set_str() call at
x86_cpu_load_def() will read data outside the model_id array.

We could increase the array size to 49, but this would mean the
compiler would not issue a warning if a 49-char string is used by
mistake for model_id.

To make things simpler, simply change model_id to be const char*,
and validate the string length using an assert() on
x86_register_cpudef_type().

Reported-by: "Dr. David Alan Gilbert" <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: a33a2cfe2f771b360b3422f6cdf566a560860bfc
      
https://github.com/qemu/qemu/commit/a33a2cfe2f771b360b3422f6cdf566a560860bfc
  Author: Paolo Bonzini <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/kvm.c
    M target/i386/machine.c

  Log Message:
  -----------
  i386: Add support for SPEC_CTRL MSR

Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: a2381f0934432ef2cd47a335348ba8839632164c
      
https://github.com/qemu/qemu/commit/a2381f0934432ef2cd47a335348ba8839632164c
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  i386: Add spec-ctrl CPUID bit

Add the feature name and a CPUID_7_0_EDX_SPEC_CTRL macro.

Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 1b3420e1c4d523c49866cca4e7544753201cd43d
      
https://github.com/qemu/qemu/commit/1b3420e1c4d523c49866cca4e7544753201cd43d
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.c
    M target/i386/cpu.h

  Log Message:
  -----------
  i386: Add FEAT_8000_0008_EBX CPUID feature word

Add the new feature word and the "ibpb" feature flag.

Based on a patch by Paolo Bonzini.

Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: ac96c41354b7e4c70b756342d9b686e31ab87458
      
https://github.com/qemu/qemu/commit/ac96c41354b7e4c70b756342d9b686e31ab87458
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  i386: Add new -IBRS versions of Intel CPU models

The new MSR IA32_SPEC_CTRL MSR was introduced by a recent Intel
microcode updated and can be used by OSes to mitigate
CVE-2017-5715.  Unfortunately we can't change the existing CPU
models without breaking existing setups, so users need to
explicitly update their VM configuration to use the new *-IBRS
CPU model if they want to expose IBRS to guests.

The new CPU models are simple copies of the existing CPU models,
with just CPUID_7_0_EDX_SPEC_CTRL added and model_id updated.

Cc: Jiri Denemark <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 6cfbc54e8903a9bcc0346119949162d040c144c1
      
https://github.com/qemu/qemu/commit/6cfbc54e8903a9bcc0346119949162d040c144c1
  Author: Eduardo Habkost <address@hidden>
  Date:   2018-01-17 (Wed, 17 Jan 2018)

  Changed paths:
    M target/i386/cpu.c

  Log Message:
  -----------
  i386: Add EPYC-IBPB CPU model

EPYC-IBPB is a copy of the EPYC CPU model with
just CPUID_8000_0008_EBX_IBPB added.

Cc: Jiri Denemark <address@hidden>
Cc: Tom Lendacky <address@hidden>
Cc: Brijesh Singh <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 5cad8ca516011695a37d5be905292722b5249da8
      
https://github.com/qemu/qemu/commit/5cad8ca516011695a37d5be905292722b5249da8
  Author: Peter Maydell <address@hidden>
  Date:   2018-01-18 (Thu, 18 Jan 2018)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M include/hw/i386/pc.h
    M target/i386/cpu.c
    M target/i386/cpu.h
    M target/i386/kvm.c
    M target/i386/machine.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into 
staging

x86 queue, 2018-01-17

Highlight: new CPU models that expose CPU features that guests
can use to mitigate CVE-2017-5715 (Spectre variant #2).

# gpg: Signature made Thu 18 Jan 2018 02:00:03 GMT
# gpg:                using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-pull-request:
  i386: Add EPYC-IBPB CPU model
  i386: Add new -IBRS versions of Intel CPU models
  i386: Add FEAT_8000_0008_EBX CPUID feature word
  i386: Add spec-ctrl CPUID bit
  i386: Add support for SPEC_CTRL MSR
  i386: Change X86CPUDefinition::model_id to const char*
  target/i386: add clflushopt to "Skylake-Server" cpu model
  pc: add 2.12 machine types

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/6e03cc5cf0da...5cad8ca51601
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