[Qemu-commits] [qemu/qemu] dda244: target/xtensa: add .inc. to non-top level source f...

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: dda2441b2bc6844eb4900bf4a7db83157dcd6c3c
      
https://github.com/qemu/qemu/commit/dda2441b2bc6844eb4900bf4a7db83157dcd6c3c
  Author: Max Filippov <address@hidden>
  Date:   2018-03-26 (Mon, 26 Mar 2018)

  Changed paths:
    M target/xtensa/core-dc232b.c
    R target/xtensa/core-dc232b/gdb-config.c
    A target/xtensa/core-dc232b/gdb-config.inc.c
    R target/xtensa/core-dc232b/xtensa-modules.c
    A target/xtensa/core-dc232b/xtensa-modules.inc.c
    M target/xtensa/core-dc233c.c
    R target/xtensa/core-dc233c/gdb-config.c
    A target/xtensa/core-dc233c/gdb-config.inc.c
    R target/xtensa/core-dc233c/xtensa-modules.c
    A target/xtensa/core-dc233c/xtensa-modules.inc.c
    M target/xtensa/core-de212.c
    R target/xtensa/core-de212/gdb-config.c
    A target/xtensa/core-de212/gdb-config.inc.c
    R target/xtensa/core-de212/xtensa-modules.c
    A target/xtensa/core-de212/xtensa-modules.inc.c
    M target/xtensa/core-fsf.c
    R target/xtensa/core-fsf/xtensa-modules.c
    A target/xtensa/core-fsf/xtensa-modules.inc.c
    M target/xtensa/core-sample_controller.c
    R target/xtensa/core-sample_controller/gdb-config.c
    A target/xtensa/core-sample_controller/gdb-config.inc.c
    R target/xtensa/core-sample_controller/xtensa-modules.c
    A target/xtensa/core-sample_controller/xtensa-modules.inc.c
    M target/xtensa/import_core.sh

  Log Message:
  -----------
  target/xtensa: add .inc. to non-top level source file names

Fix definitions of existing cores and core importing script to follow
the rule of naming non-top level source files.

Reviewed-by: Eric Blake <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Max Filippov <address@hidden>


  Commit: 2745c3bbf362600006994fe0a72cacc2117e6bf4
      
https://github.com/qemu/qemu/commit/2745c3bbf362600006994fe0a72cacc2117e6bf4
  Author: Max Filippov <address@hidden>
  Date:   2018-03-26 (Mon, 26 Mar 2018)

  Changed paths:
    M target/xtensa/import_core.sh

  Log Message:
  -----------
  target/xtensa/import_core.sh: fix #include <xtensa-isa.h>

Change #include <xtensa-isa.h> to #include "xtensa-isa.h" in imported
files to make references to local files consistent.

Reviewed-by: Eric Blake <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Max Filippov <address@hidden>


  Commit: 12ab0b33f152b0b69f013082236d5954c5cf5207
      
https://github.com/qemu/qemu/commit/12ab0b33f152b0b69f013082236d5954c5cf5207
  Author: Max Filippov <address@hidden>
  Date:   2018-03-26 (Mon, 26 Mar 2018)

  Changed paths:
    R linux-user/xtensa/syscall.h

  Log Message:
  -----------
  linux-user/xtensa: remove stray syscall.h

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Max Filippov <address@hidden>


  Commit: d0ce7e9cfc8eda113f872b608fe4a3dd7662997e
      
https://github.com/qemu/qemu/commit/d0ce7e9cfc8eda113f872b608fe4a3dd7662997e
  Author: Max Filippov <address@hidden>
  Date:   2018-03-26 (Mon, 26 Mar 2018)

  Changed paths:
    M target/xtensa/core-dc232b.c
    M tests/tcg/xtensa/Makefile

  Log Message:
  -----------
  target/xtensa: fix timers test

The value of CCOUNT special register is calculated as time elapsed
since CCOUNT == 0 multiplied by the core frequency. In icount mode time
increment between consecutive instructions that don't involve time
warps is constant, but unless the result of multiplication of this
constant by the core frequency is a whole number the CCOUNT increment
between these instructions may not be constant. E.g. with icount=7 each
instruction takes 128ns, with core clock of 10MHz CCOUNT values for
consecutive instructions are:

  502: (128 * 502 * 10000000) / 1000000000 = 642.56
  503: (128 * 503 * 10000000) / 1000000000 = 643.84
  504: (128 * 504 * 10000000) / 1000000000 = 645.12

I.e.the CCOUNT increments depend on the absolute time. This results in
varying CCOUNT differences for consecutive instructions in tests that
involve time warps and don't set CCOUNT explicitly.

Change frequency of the core used in tests so that clock cycle takes
exactly 64ns. Change icount power used in tests to 6, so that each
instruction takes exactly 1 clock cycle. With these changes CCOUNT
increments only depend on the number of executed instructions and that's
what timer tests expect, so they work correctly.

Longer story:
  http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html

Cc: Pavel Dovgaluk <address@hidden>
Cc: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Max Filippov <address@hidden>


  Commit: 62d0289662746585239fbbf6a8d548f37f5fe6a8
      
https://github.com/qemu/qemu/commit/62d0289662746585239fbbf6a8d548f37f5fe6a8
  Author: Peter Maydell <address@hidden>
  Date:   2018-03-27 (Tue, 27 Mar 2018)

  Changed paths:
    R linux-user/xtensa/syscall.h
    M target/xtensa/core-dc232b.c
    R target/xtensa/core-dc232b/gdb-config.c
    A target/xtensa/core-dc232b/gdb-config.inc.c
    R target/xtensa/core-dc232b/xtensa-modules.c
    A target/xtensa/core-dc232b/xtensa-modules.inc.c
    M target/xtensa/core-dc233c.c
    R target/xtensa/core-dc233c/gdb-config.c
    A target/xtensa/core-dc233c/gdb-config.inc.c
    R target/xtensa/core-dc233c/xtensa-modules.c
    A target/xtensa/core-dc233c/xtensa-modules.inc.c
    M target/xtensa/core-de212.c
    R target/xtensa/core-de212/gdb-config.c
    A target/xtensa/core-de212/gdb-config.inc.c
    R target/xtensa/core-de212/xtensa-modules.c
    A target/xtensa/core-de212/xtensa-modules.inc.c
    M target/xtensa/core-fsf.c
    R target/xtensa/core-fsf/xtensa-modules.c
    A target/xtensa/core-fsf/xtensa-modules.inc.c
    M target/xtensa/core-sample_controller.c
    R target/xtensa/core-sample_controller/gdb-config.c
    A target/xtensa/core-sample_controller/gdb-config.inc.c
    R target/xtensa/core-sample_controller/xtensa-modules.c
    A target/xtensa/core-sample_controller/xtensa-modules.inc.c
    M target/xtensa/import_core.sh
    M tests/tcg/xtensa/Makefile

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/xtensa/tags/20180326-xtensa' into 
staging

target/xtensa fixes for 2.12:

- add .inc. to non-top level source file names under target/xtensa;
- fix #include <xtensa-isa.h> in the import_core.sh script;
- remove stray linux-user/xtensa/syscall.h;
- fix timers test.

# gpg: Signature made Mon 26 Mar 2018 22:40:20 BST
# gpg:                using RSA key 51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# gpg:                 aka "Max Filippov <address@hidden>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20180326-xtensa:
  target/xtensa: fix timers test
  linux-user/xtensa: remove stray syscall.h
  target/xtensa/import_core.sh: fix #include <xtensa-isa.h>
  target/xtensa: add .inc. to non-top level source file names

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/bdc408e91b14...62d028966274