[Qemu-commits] [qemu/qemu] f2f1dd: tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f2f1dde75160cac6ede330f3db50dc817d01a2d6
      
https://github.com/qemu/qemu/commit/f2f1dde75160cac6ede330f3db50dc817d01a2d6
  Author: Richard Henderson <address@hidden>
  Date:   2018-03-28 (Wed, 28 Mar 2018)

  Changed paths:
    M tcg/tcg-opc.h

  Log Message:
  -----------
  tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops

Failure to do so results in the tcg optimizer sign-extending
any constant fold from 32-bits.  This turns out to be visible
in the RISC-V testsuite using a host that emits these opcodes
(e.g. any non-x86_64).

Reported-by: Michael Clark <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 043289bef4d9c0d277c45695c676a6cc9fca48a0
      
https://github.com/qemu/qemu/commit/043289bef4d9c0d277c45695c676a6cc9fca48a0
  Author: Peter Maydell <address@hidden>
  Date:   2018-03-28 (Wed, 28 Mar 2018)

  Changed paths:
    M tcg/tcg-opc.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180328' into staging

Fix muluh_i64 and mulsh_i64 flags

# gpg: Signature made Wed 28 Mar 2018 05:46:45 BST
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <address@hidden>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20180328:
  tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/fa3704d87720...043289bef4d9