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Re: [Qemu-devel] Re: [PATCH] Updated Sparc support
From: |
Rusty Russell |
Subject: |
Re: [Qemu-devel] Re: [PATCH] Updated Sparc support |
Date: |
Wed, 14 May 2003 10:13:50 +1000 |
In message <address@hidden> you write:
> I also plan to add direct block chaining. I will try to make it portable
> by using the 'goto *' gcc extension, but I don't know yet if it will
> work on every CPU. The direct block chaining will generate something like:
>
> 'goto *addr'
>
> at the end of some translated blocks to jump either to the CPU core or
> directly to the next translated block. 'addr' will be a global 'void *'
> variable. Since no code will be patched to change block chaining, it
> will simplify the instruction cache invalidation issues and the
> threading issues.
Hmm, I had a more ambitious idea, and that was to keep simple stats on
which block last followed each block: if it goes to the same block
more than N times in a row, coalesce/chain them.
As blocks get longer, you have more opportunities for register
lifetime analsis, which could eliminate redundant stores to registers
in particular.
I haven't got actual code, so I haven't mentioned it before...
Thoughts?
Rusty.
--
Anyone who quotes me in their sig is an idiot. -- Rusty Russell.