Index: Makefile
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile,v
retrieving revision 1.29
diff -u -p -r1.29 Makefile
--- Makefile	14 May 2003 19:48:46 -0000	1.29
+++ Makefile	16 May 2003 17:28:17 -0000
@@ -109,7 +109,7 @@ translate-i386.o: translate-i386.c op-i3
 op-i386.h: op-i386.o dyngen
 	./dyngen -o $@ $<
 
-op-i386.o: op-i386.c opreg_template.h ops_template.h
+op-i386.o: op-i386.c opreg_template.h ops_template.h op_string.h
 	$(CC) $(OP_CFLAGS) $(DEFINES) -c -o $@ $<
 
 %.o: %.c
Index: cpu-i386.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-i386.h,v
retrieving revision 1.26
diff -u -p -r1.26 cpu-i386.h
--- cpu-i386.h	14 May 2003 21:51:13 -0000	1.26
+++ cpu-i386.h	16 May 2003 17:28:18 -0000
@@ -589,7 +589,7 @@ static inline int testandset (int *p)
 #endif
 
 #ifdef __alpha__
-int testandset (int *p)
+static inline int testandset (int *p)
 {
     int ret;
     unsigned long one;
Index: dyngen.c
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen.c,v
retrieving revision 1.13
diff -u -p -r1.13 dyngen.c
--- dyngen.c	13 May 2003 18:59:59 -0000	1.13
+++ dyngen.c	16 May 2003 17:28:18 -0000
@@ -634,7 +634,7 @@ void gen_code(const char *name, host_ulo
 			case R_ALPHA_BRSGP:
 			    /* PC-relative jump. Tweak offset to skip the two instructions that try to
 			       set up the gp from the pv.  */
-			    fprintf(outfile, "    fix_bsr(gen_code_ptr + %ld, (uint8_t *) &%s - (gen_code_ptr + %ld) + 4);\n",
+			    fprintf(outfile, "    fix_bsr(gen_code_ptr + %ld, (uint8_t *) &%s - (gen_code_ptr + %ld + 4) + 8);\n",
 				    rel->r_offset - start_offset, sym_name, rel->r_offset - start_offset);
 			    break;
 			default:
Index: exec-i386.c
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-i386.c,v
retrieving revision 1.22
diff -u -p -r1.22 exec-i386.c
--- exec-i386.c	14 May 2003 23:01:10 -0000	1.22
+++ exec-i386.c	16 May 2003 17:28:20 -0000
@@ -398,6 +398,34 @@ int cpu_x86_signal_handler(int host_sign
                              is_write, &uc->uc_sigmask);
 }
 
+#elif defined(__alpha__)
+
+int cpu_x86_signal_handler(int host_signum, struct siginfo *info, 
+                           void *puc)
+{
+    struct ucontext *uc = puc;
+    uint32_t *pc = uc->uc_mcontext.sc_pc;
+    uint32_t insn = *pc;
+    int is_write = 0;
+
+    switch (insn >> 26) {
+    case 0x0d: // stw
+    case 0x0e: // stb
+    case 0x0f: // stq_u
+    case 0x24: // stf
+    case 0x25: // stg
+    case 0x26: // sts
+    case 0x27: // stt
+    case 0x2c: // stl
+    case 0x2d: // stq
+    case 0x2e: // stl_c
+    case 0x2f: // stq_c
+	is_write = 1;
+    }
+
+    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
+                             is_write, &uc->uc_sigmask);
+}
 #else
 
 #error CPU specific signal handler needed
Index: exec-i386.h
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-i386.h,v
retrieving revision 1.14
diff -u -p -r1.14 exec-i386.h
--- exec-i386.h	13 May 2003 18:59:59 -0000	1.14
+++ exec-i386.h	16 May 2003 17:28:20 -0000
@@ -124,6 +124,8 @@ register unsigned int A0 asm("$11");
 register unsigned int EAX asm("$12");
 register unsigned int ESP asm("$13");
 register unsigned int EBP asm("$14");
+/* Note $15 is the frame pointer, so anything in op-i386.c that would
+   require a frame pointer, like alloca, would probably loose.  */
 register struct CPUX86State *env asm("$15");
 #define reg_EAX
 #define reg_ESP
Index: op-i386.c
===================================================================
RCS file: /cvsroot/qemu/qemu/op-i386.c,v
retrieving revision 1.28
diff -u -p -r1.28 op-i386.c
--- op-i386.c	10 May 2003 21:35:30 -0000	1.28
+++ op-i386.c	16 May 2003 17:28:22 -0000
@@ -1648,16 +1648,16 @@ typedef union {
     double d;
 #ifndef WORDS_BIGENDIAN
     struct {
-        unsigned long lower;
-        long upper;
+        uint32_t lower;
+        int32_t upper;
     } l;
 #else
     struct {
-        long upper;
-        unsigned long lower;
+        int32_t upper;
+        uint32_t lower;
     } l;
 #endif
-    long long ll;
+    int64_t ll;
 } CPU86_LDoubleU;
 
 /* the following deal with IEEE double-precision numbers */