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From: | Fabrice Bellard |
Subject: | [Qemu-devel] qemu cpu-exec.c cpu-i386.h exec.h helper-i386.c... |
Date: | Wed, 20 Aug 2003 19:02:09 -0400 |
CVSROOT: /cvsroot/qemu Module name: qemu Branch: Changes by: Fabrice Bellard <address@hidden> 03/08/20 19:02:09 Modified files: . : cpu-exec.c cpu-i386.h exec.h helper-i386.c helper2-i386.c op-i386.c softmmu_template.h translate-i386.c Log message: pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags CVSWeb URLs: http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/cpu-exec.c.diff?tr1=1.13&tr2=1.14&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/cpu-i386.h.diff?tr1=1.39&tr2=1.40&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/exec.h.diff?tr1=1.18&tr2=1.19&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/helper-i386.c.diff?tr1=1.14&tr2=1.15&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/helper2-i386.c.diff?tr1=1.1&tr2=1.2&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/op-i386.c.diff?tr1=1.46&tr2=1.47&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/softmmu_template.h.diff?tr1=1.2&tr2=1.3&r1=text&r2=text http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/translate-i386.c.diff?tr1=1.57&tr2=1.58&r1=text&r2=text
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