diff -Nurb qemu_cvs/hw/ne2000.c qemu__ne2000_savevm/hw/ne2000.c --- qemu_cvs/hw/ne2000.c 2004-10-01 14:50:48.000000000 +0200 +++ qemu__ne2000_savevm/hw/ne2000.c 2004-10-01 14:50:42.000000000 +0200 @@ -538,6 +538,59 @@ return 0; } +static void ne2000_save(QEMUFile* f,void* opaque) +{ + NE2000State* s=(NE2000State*)opaque; + + qemu_put_8s(f, &s->cmd); + qemu_put_be32s(f, &s->start); + qemu_put_be32s(f, &s->stop); + qemu_put_8s(f, &s->boundary); + qemu_put_8s(f, &s->tsr); + qemu_put_8s(f, &s->tpsr); + qemu_put_be16s(f, &s->tcnt); + qemu_put_be16s(f, &s->rcnt); + qemu_put_be32s(f, &s->rsar); + qemu_put_8s(f, &s->rsr); + qemu_put_8s(f, &s->isr); + qemu_put_8s(f, &s->dcfg); + qemu_put_8s(f, &s->imr); + qemu_put_buffer(f, s->phys, 6); + qemu_put_8s(f, &s->curpag); + qemu_put_buffer(f, s->mult, 8); + qemu_put_be32s(f, &s->irq); + qemu_put_buffer(f, s->mem, NE2000_MEM_SIZE); +} + +static int ne2000_load(QEMUFile* f,void* opaque,int version_id) +{ + NE2000State* s=(NE2000State*)opaque; + + if (version_id != 1) + return -EINVAL; + + qemu_get_8s(f, &s->cmd); + qemu_get_be32s(f, &s->start); + qemu_get_be32s(f, &s->stop); + qemu_get_8s(f, &s->boundary); + qemu_get_8s(f, &s->tsr); + qemu_get_8s(f, &s->tpsr); + qemu_get_be16s(f, &s->tcnt); + qemu_get_be16s(f, &s->rcnt); + qemu_get_be32s(f, &s->rsar); + qemu_get_8s(f, &s->rsr); + qemu_get_8s(f, &s->isr); + qemu_get_8s(f, &s->dcfg); + qemu_get_8s(f, &s->imr); + qemu_get_buffer(f, s->phys, 6); + qemu_get_8s(f, &s->curpag); + qemu_get_buffer(f, s->mult, 8); + qemu_get_be32s(f, &s->irq); + qemu_get_buffer(f, s->mem, NE2000_MEM_SIZE); + + return 0; +} + void isa_ne2000_init(int base, int irq, NetDriverState *nd) { NE2000State *s; @@ -562,6 +615,9 @@ ne2000_reset(s); qemu_add_read_packet(nd, ne2000_can_receive, ne2000_receive, s); + + register_savevm("ne2000", 0, 1, ne2000_save, ne2000_load, s); + } /***********************************************************/ @@ -612,7 +668,7 @@ pci_conf[0x0e] = 0x00; // header_type pci_conf[0x3d] = 1; // interrupt pin 0 - pci_register_io_region((PCIDevice *)d, 0, 0x100, + pci_register_io_region(&d->dev, 0, 0x100, PCI_ADDRESS_SPACE_IO, ne2000_map); s = &d->ne2000; s->irq = 16; // PCI interrupt @@ -620,4 +676,9 @@ s->nd = nd; ne2000_reset(s); qemu_add_read_packet(nd, ne2000_can_receive, ne2000_receive, s); + + register_savevm("ne2000", 0, 1, ne2000_save, ne2000_load, s); + register_savevm("ne2000_pci", 0, 1, generic_pci_save, generic_pci_load, &d->dev); + } + diff -Nurb qemu_cvs/hw/pci.c qemu__ne2000_savevm/hw/pci.c --- qemu_cvs/hw/pci.c 2004-10-01 14:50:48.000000000 +0200 +++ qemu__ne2000_savevm/hw/pci.c 2004-10-01 14:50:42.000000000 +0200 @@ -62,6 +62,31 @@ return bus; } +void generic_pci_save(QEMUFile* f,void* opaque) +{ + PCIDevice* s=(PCIDevice*)opaque; + + qemu_put_buffer(f, s->config, 256); + qemu_put_be32s(f, &s->devfn); + qemu_put_buffer(f, s->name, 64); + qemu_put_be32s(f, &s->irq_index); +} + +int generic_pci_load(QEMUFile* f,void* opaque,int version_id) +{ + PCIDevice* s=(PCIDevice*)opaque; + + if (version_id != 1) + return -EINVAL; + + qemu_get_buffer(f, s->config, 256); + qemu_get_be32s(f, &s->devfn); + qemu_get_buffer(f, s->name, 64); + qemu_get_be32s(f, &s->irq_index); + + return 0; +} + /* -1 for devfn means auto assign */ PCIDevice *pci_register_device(PCIBus *bus, const char *name, int instance_size, int devfn, @@ -96,6 +121,7 @@ pci_dev->config_write = config_write; pci_dev->irq_index = pci_irq_index++; bus->devices[devfn] = pci_dev; + return pci_dev; } @@ -558,6 +584,8 @@ d = (PIIX3State *)pci_register_device(bus, "PIIX3", sizeof(PIIX3State), -1, NULL, NULL); + register_savevm("PIIX3", 0, 1, generic_pci_save, generic_pci_load, d); + piix3_state = d; pci_conf = d->dev.config; diff -Nurb qemu_cvs/vl.h qemu__ne2000_savevm/vl.h --- qemu_cvs/vl.h 2004-10-01 14:50:47.000000000 +0200 +++ qemu__ne2000_savevm/vl.h 2004-10-01 14:50:45.000000000 +0200 @@ -480,6 +480,8 @@ uint32_t address, int len); void pci_default_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len); +void generic_pci_save(QEMUFile* f,void* opaque); +int generic_pci_load(QEMUFile* f,void* opaque,int version_id); extern struct PIIX3State *piix3_state;