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[Qemu-devel] sparc system emulator scsi write delays
From: |
Andrew Tonner |
Subject: |
[Qemu-devel] sparc system emulator scsi write delays |
Date: |
Mon, 13 Feb 2006 01:32:25 -0800 |
I'm trying to get the sparc system emulator going... I'm booting it
with the kernel from
sparc-test and the debian woody rootdisk
(http://http.us.debian.org/debian/dists/woody/main/disks-sparc/current/images-1.44/root.bin)
loading through initrd.
The boot-floppies setup boots fine and does its thing, but I can't
write a partition table to
the emulated scsi disk properly.
After experimenting with some writes using dd, I noticed that blocks
were only getting to the disk image after a 1 write delay. With some
observation of the ESP debug trace, I
figured out that writes are happening ahead of the DMA transfers of
the data from the blocks to be written... So a write actually writes
whatever was hanging around in the buffer from the last DMA transfer,
and then reloads the buffer afterward. You can see in the
ESP debug trace below where the write happens ('Write (10)') and the
DMA transfer below
it ('Transfer Information len 512').
I don't have specs for the ESP100, so I don't really know how to
continue. I don't know whether this is really a problem with the ESP
emulation or just with the Linux kernel, though I suspect the former
since I'm sure the latter has been tested on a boatload of dreaded old
sun4m SSs. There could be some non-obvious reason the write would be
delayed according to spec or maybe some other bug in the emulated ESP
that I'm not seeing. Can someone point me at detailed specs online
somewhere?
-AT
** a typical command line:
qemu-system-sparc -hda sun4m.hd -kernel sparc-test/vmlinux-2.6.11+tcx
-initrd root.bin -append console=ttyS0 -nographic
(sun4m.hd is a 1M raw image for easy fiddling)
** ESP debug trace
for a 1-block write at offset 0... I've beefed up ESP's debugging
output a bit. The
data here is from an identical write done just before.
ESP: write reg[4]: 0x00 -> 0x00
ESP: write reg[0]: 0x02 -> 0x0b
ESP: write reg[1]: 0x00 -> 0x00
ESP: read dmareg[0]: 0xa4000010
ESP: write dmareg[0]: 0xa4000010 -> 0xa4000210
ESP: write dmareg[1]: 0xf000d000 -> 0xf000d000
ESP: write reg[3]: 0x12 -> 0xc2
ESP: Select with ATN len 11 target 0
ESP: DMA Direction: r, regs0: 4000000, addr 0x07e01000
ESP: Command 80
ESP: Command 2a
ESP: Command 00
ESP: Command 00
ESP: Command 00
ESP: Command 00
ESP: Command 00
ESP: Command 00
ESP: Command 00
ESP: Command 01
ESP: Command 00
ESP: Write (10) (offset 0 len 1 dma 1)
ESP: Dump, sector 0 of 1
ESP: Dump, offset 0: 0 0 4C 46 1 2 1 0
ESP: Dump, offset 8: 0 0 0 0 0 0 0 0
ESP: Dump, offset 16: 0 2 0 2 0 0 0 1
ESP: Dump, offset 24: 0 1 2B A0 0 0 0 34
ESP: Dump, offset 32: 0 2 BA 20 0 0 0 0
ESP: Dump, offset 40: 0 34 0 20 0 6 0 28
ESP: Dump, offset 48: 0 18 0 17 0 0 0 6
ESP: Dump, offset 56: 0 0 0 34 0 1 0 34
ESP: Dump, offset 64: 0 1 0 34 0 0 0 C0
ESP: Dump, offset 72: 0 0 0 C0 0 0 0 5
ESP: Dump, offset 80: 0 0 0 4 0 0 0 3
ESP: Dump, offset 88: 0 0 0 F4 0 1 0 F4
ESP: Dump, offset 96: 0 1 0 F4 0 0 0 13
ESP: Dump, offset 104: 0 0 0 13 0 0 0 4
ESP: Dump, offset 112: 0 0 0 1 0 0 0 1
ESP: Dump, offset 120: 0 0 0 0 0 1 0 0
ESP: Dump, offset 128: 0 1 0 0 0 2 A7 10
ESP: Dump, offset 136: 0 2 A7 10 0 0 0 5
ESP: Dump, offset 144: 0 1 0 0 0 0 0 1
ESP: Dump, offset 152: 0 2 A7 10 0 4 A7 10
ESP: Dump, offset 160: 0 4 A7 10 0 0 12 58
ESP: Dump, offset 168: 0 0 6A 58 0 0 0 7
ESP: Dump, offset 176: 0 1 0 0 0 0 0 2
ESP: Dump, offset 184: 0 2 AE 44 0 4 AE 44
ESP: Dump, offset 192: 0 4 AE 44 0 0 0 C8
ESP: Dump, offset 200: 0 0 0 C8 0 0 0 6
ESP: Dump, offset 208: 0 0 0 4 0 0 0 4
ESP: Dump, offset 216: 0 0 1 8 0 1 1 8
ESP: Dump, offset 224: 0 1 1 8 0 0 0 20
ESP: Dump, offset 232: 0 0 0 20 0 0 0 4
ESP: Dump, offset 240: 0 0 0 4 2F 6C 69 62
ESP: Dump, offset 248: 2F 6C 64 2D 6C 69 6E 75
ESP: Dump, offset 256: 78 2E 73 6F 2E 32 0 0
ESP: Dump, offset 264: 0 0 0 4 0 0 0 10
ESP: Dump, offset 272: 0 0 0 1 47 4E 55 0
ESP: Dump, offset 280: 0 0 0 0 0 0 0 2
ESP: Dump, offset 288: 0 0 0 2 0 0 0 0
ESP: Dump, offset 296: 0 0 0 C5 0 0 0 EE
ESP: Dump, offset 304: 0 0 0 76 0 0 0 E6
ESP: Dump, offset 312: 0 0 0 8D 0 0 0 0
ESP: Dump, offset 320: 0 0 0 40 0 0 0 7A
ESP: Dump, offset 328: 0 0 0 0 0 0 0 B0
ESP: Dump, offset 336: 0 0 0 C5 0 0 0 0
ESP: Dump, offset 344: 0 0 0 B7 0 0 0 B2
ESP: Dump, offset 352: 0 0 0 0 0 0 0 BC
ESP: Dump, offset 360: 0 0 0 0 0 0 0 0
ESP: Dump, offset 368: 0 0 0 71 0 0 0 86
ESP: Dump, offset 376: 0 0 0 0 0 0 0 9E
ESP: Dump, offset 384: 0 0 0 B1 0 0 0 65
ESP: Dump, offset 392: 0 0 0 5A 0 0 0 3
ESP: Dump, offset 400: 0 0 0 8A 0 0 0 0
ESP: Dump, offset 408: 0 0 0 64 0 0 0 0
ESP: Dump, offset 416: 0 0 0 56 0 0 0 92
ESP: Dump, offset 424: 0 0 0 0 0 0 0 97
ESP: Dump, offset 432: 0 0 0 6A 0 0 0 EC
ESP: Dump, offset 440: 0 0 0 0 0 0 0 90
ESP: Dump, offset 448: 0 0 0 26 0 0 0 5C
ESP: Dump, offset 456: 0 0 0 CE 0 0 0 80
ESP: Dump, offset 464: 0 0 0 AA 0 0 0 8F
ESP: Dump, offset 472: 0 0 0 0 0 0 0 A4
ESP: Dump, offset 480: 0 0 0 0 0 0 0 0
ESP: Dump, offset 488: 0 0 0 EB 0 0 0 AC
ESP: Dump, offset 496: 0 0 0 0 0 0 0 0
ESP: Dump, offset 504: 0 0 0 ED 0 0 0 0
ESP: Write result: 0
ESP: set_irq(18): 1
ESP: read dmareg[0]: 0x04000001
ESP: read dmareg[0]: 0x04000001
ESP: write dmareg[0]: 0x04000001 -> 0x04000001
ESP: set_irq(18): 0
ESP: read reg[4]: 0x91
ESP: read dmareg[0]: 0xa4000001
ESP: read reg[5]: 0x18
ESP: set_irq(18): 0
ESP: read reg[6]: 0x04
ESP: read reg[7]: 0x02
ESP: read dmareg[1]: 0xf000d000
ESP: read dmareg[0]: 0xa4000000
ESP: write dmareg[0]: 0xa4000000 -> 0xa4000020
ESP: set_irq(18): 0
ESP: write dmareg[0]: 0xa4000020 -> 0xa4000000
ESP: set_irq(18): 0
ESP: write reg[3]: 0xc2 -> 0x00
ESP: NOP (00)
ESP: write reg[3]: 0x00 -> 0x00
ESP: NOP (00)
ESP: write reg[0]: 0x0b -> 0x00
ESP: write reg[1]: 0x00 -> 0x02
ESP: read dmareg[0]: 0xa4000000
ESP: write dmareg[0]: 0xa4000000 -> 0xa4000300
ESP: set_irq(18): 0
ESP: write dmareg[1]: 0xf000d000 -> 0xf0016000
ESP: write reg[3]: 0x00 -> 0x90
ESP: Transfer Information len 512
ESP: DMA Direction: r, addr 0x00b8f000
ESP: set_irq(18): 1
ESP: read dmareg[0]: 0x04000001
ESP: write dmareg[0]: 0x04000001 -> 0x04000011
ESP: read dmareg[0]: 0xa4000011
ESP: read dmareg[0]: 0xa4000011
ESP: write dmareg[0]: 0xa4000011 -> 0xa4000001
ESP: set_irq(18): 0
ESP: read reg[4]: 0x93
ESP: read dmareg[0]: 0xa4000001
ESP: read reg[5]: 0x10
ESP: set_irq(18): 0
ESP: read dmareg[0]: 0xa4000000
ESP: read dmareg[0]: 0xa4000000
ESP: write dmareg[0]: 0xa4000000 -> 0xa4000020
ESP: set_irq(18): 0
ESP: write dmareg[0]: 0xa4000020 -> 0xa4000000
ESP: set_irq(18): 0
ESP: read reg[7]: 0x02
ESP: read reg[0]: 0x00
ESP: read reg[1]: 0x02
ESP: write reg[3]: 0x90 -> 0x01
ESP: Flush FIFO (01)
ESP: write reg[3]: 0x01 -> 0x01
ESP: Flush FIFO (01)
ESP: write reg[0]: 0x00 -> 0x02
ESP: write reg[1]: 0x02 -> 0x00
ESP: read dmareg[0]: 0xa4000000
ESP: write dmareg[0]: 0xa4000000 -> 0xa4000300
ESP: set_irq(18): 0
ESP: write dmareg[1]: 0xf0016000 -> 0xf000d000
ESP: write reg[3]: 0x01 -> 0x91
ESP: Initiator Command Complete Sequence (91)
ESP: Transfer status len 2
ESP: DMA Direction: w
ESP: set_irq(18): 1
ESP: read dmareg[0]: 0x04000001
ESP: read reg[4]: 0x93
ESP: read reg[5]: 0x18
ESP: set_irq(18): 0
ESP: write reg[3]: 0x91 -> 0x12
ESP: Message Accepted (12)
ESP: Transfer status len 2
ESP: set_irq(18): 1
ESP: read dmareg[0]: 0x04000001
ESP: read dmareg[0]: 0x04000001
ESP: write dmareg[0]: 0x04000001 -> 0x04000021
ESP: set_irq(18): 0
ESP: write dmareg[0]: 0xa4000021 -> 0x04000001
ESP: set_irq(18): 0
ESP: read dmareg[0]: 0xa4000001
ESP: read reg[4]: 0x10
ESP: read reg[5]: 0x20
ESP: set_irq(18): 0
ESP: read dmareg[0]: 0xa4000000
ESP: write dmareg[0]: 0xa4000000 -> 0xa4000010
** dmesg output:
PROMLIB: Sun Boot Prom Version 3 Revision 77
Linux version 2.6.11 (address@hidden) (gcc version 2.95.4 20010319
(prerelease)) #3 Tue Mar 15 18:21:10 UTC 2005
ARCH: SUN4M
TYPE: SparcStation
Ethernet address: 52:54:0:12:34:56
Boot time fixup v1.6. 4/Mar/98 Jakub Jelinek (address@hidden).
Patching kernel for srmmu[Fujitsu Swift]/iommu
On node 0 totalpages: 31748
DMA zone: 31748 pages, LIFO batch:7
Normal zone: 0 pages, LIFO batch:1
HighMem zone: 0 pages, LIFO batch:1
Power off control detected.
Built 1 zonelists
Kernel command line: console=ttyS0
PID hash table entries: 512 (order: 9, 8192 bytes)
Console: colour dummy device 80x25
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 123520k/130832k available (1848k kernel code, 7184k reserved,
496k data, 156k init, 0k highmem)
Calibrating delay loop... 204.39 BogoMIPS (lpj=1021952)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
checking if image is initramfs...it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 1131k freed
NET: Registered protocol family 16
SCSI subsystem initialized
IOMMU: impl 0 vers 4 table 0xf0800000[262144 B] map [65536 b]
sbus0: Clock 25.0 MHz
dma0: Revision 2
dma1: Revision 2
Initializing Cryptographic API
ioremap: done with statics, switching to malloc
Console: switching to colour frame buffer device 128x48
tcx: SUNW,tcx at 0:50800000, 24-bit depth
lp: driver loaded but no devices found
SunZilog: 2 chips.
zs2 at 0xfd3d7004 (irq = 44) is a SunZilog
zs3 at 0xfd3d7000 (irq = 44) is a SunZilog
Console: ttyS0 (SunZilog zs0)
ttyS0 at MMIO 0x0 (irq = 44) is a SunZilog
ttyS1 at MMIO 0x0 (irq = 44) is a SunZilog
io scheduler noop registered
Floppy drive(s): fd0 is 1.44M
FDC 0 is a S82078B
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
loop: loaded (max 8 devices)
sunlance.c:v2.02 24/Aug/03 Miguel de Icaza (address@hidden)
SunLance: using auto-carrier-detection.
SunLance: warning: overriding option 'tpe-link-test?'
SunLance: warning: mail any problems to address@hidden
eth0: LANCE 52:54:00:12:34:56
esp0: IRQ 36 SCSI ID 7 Clk 20MHz CCYC=50000 CCF=4 TOut 167 NCR53C90(esp100)
ESP: Total of 1 ESP hosts found, 1 actually in use.
scsi0 : Sparc ESP100 (NCR53C90)
Vendor: QEMU Model: QEMU HARDDISK Rev:
Type: Direct-Access ANSI SCSI revision: 01
Vendor: QEMU Model: QEMU CDROM Rev:
Type: CD-ROM ANSI SCSI revision: 01
sda : sector size 0 reported, assuming 512.
SCSI device sda: 1 512-byte hdwr sectors (0 MB)
sda: asking for cache data failed
sda: assuming drive cache: write through
SCSI device sda: 2051 512-byte hdwr sectors (1 MB)
sda: asking for cache data failed
sda: assuming drive cache: write through
sda: unknown partition table
Attached scsi disk sda at scsi0, channel 0, id 0, lun 0
Attached scsi disk sda at scsi0, channel 0, id 0, lun 0
sr0: scsi3-mmc drive: 0x/0x caddy
Uniform CD-ROM driver Revision: 3.20
Attached scsi CD-ROM sr0 at scsi0, channel 0, id 2, lun 0
Attached scsi generic sg0 at scsi0, channel 0, id 0, lun 0, type 0
Attached scsi generic sg1 at scsi0, channel 0, id 2, lun 0, type 5
mice: PS/2 mouse device common for all mice
evbug.c: Connected device: "Sun Type 5 keyboard", zs/serio0/input0
input: Sun Type 5 keyboard on zs/serio0
evbug.c: Connected device: "Sun Mouse", zs/serio1/input0
input: Sun Mouse on zs/serio1
NET: Registered protocol family 2
IP: routing cache hash table of 1024 buckets, 8Kbytes
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
NET: Registered protocol family 1
NET: Registered protocol family 17
RAMDISK: Compressed image found at block 0
VFS: Mounted root (ext2 filesystem).
- [Qemu-devel] sparc system emulator scsi write delays,
Andrew Tonner <=