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[Qemu-devel] [PATCH] Only stop TB translation when necessary
|
From: |
Thiemo Seufer |
|
Subject: |
[Qemu-devel] [PATCH] Only stop TB translation when necessary |
|
Date: |
Tue, 28 Feb 2006 16:10:50 +0000 |
|
User-agent: |
Mutt/1.5.11+cvs20060126 |
Hello All,
this patch avoid the use of BS_STOP as far as possible, and adds
some BS_EXCP to reduce exception latency. (The architecture definition
requires precise exceptions in those cases.)
Thiemo
Index: qemu-work/target-mips/translate.c
===================================================================
--- qemu-work.orig/target-mips/translate.c 2006-02-19 17:51:44.000000000
+0000
+++ qemu-work/target-mips/translate.c 2006-02-19 21:02:11.000000000 +0000
@@ -546,6 +546,7 @@
default:
MIPS_INVAL("load/store");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
MIPS_DEBUG("%s %s, %d(%s)", opn, regnames[rt], offset, regnames[base]);
@@ -625,6 +626,7 @@
default:
MIPS_INVAL("imm arith");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
GEN_STORE_TN_REG(rt, T0);
@@ -716,6 +718,7 @@
default:
MIPS_INVAL("arith");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
GEN_STORE_TN_REG(rd, T0);
@@ -757,6 +760,7 @@
default:
MIPS_INVAL("HILO");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
MIPS_DEBUG("%s %s", opn, regnames[reg]);
@@ -805,6 +809,7 @@
default:
MIPS_INVAL("mul/div");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
MIPS_DEBUG("%s %s %s", opn, regnames[rs], regnames[rt]);
@@ -834,6 +839,7 @@
default:
MIPS_INVAL("CLx");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
gen_op_store_T0_gpr(rd);
@@ -897,6 +903,7 @@
default:
MIPS_INVAL("TRAP");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
} else {
@@ -928,6 +935,7 @@
default:
MIPS_INVAL("TRAP");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
}
@@ -1009,6 +1017,7 @@
if (offset != 0) {
/* Only hint = 0 is valid */
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
GEN_LOAD_REG_TN(T2, rs);
@@ -1016,6 +1025,7 @@
default:
MIPS_INVAL("branch/jump");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
if (bcond == 0) {
@@ -1081,6 +1091,7 @@
default:
MIPS_INVAL("branch/jump");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
} else {
@@ -1322,6 +1333,7 @@
}
#endif
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
}
static void gen_mtc0 (DisasContext *ctx, int reg, int sel)
@@ -1375,10 +1387,14 @@
case 12:
gen_op_mtc0_status();
rn = "Status";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 13:
gen_op_mtc0_cause();
rn = "Cause";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 14:
gen_op_mtc0_epc();
@@ -1389,6 +1405,8 @@
case 0:
gen_op_mtc0_config0();
rn = "Config0";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
default:
rn = "Invalid config selector";
@@ -1406,6 +1424,8 @@
case 23:
gen_op_mtc0_debug();
rn = "Debug";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
case 24:
gen_op_mtc0_depc();
@@ -1429,6 +1449,8 @@
case 31:
gen_op_mtc0_desave();
rn = "DESAVE";
+ /* Stop translation as we may have switched the execution mode */
+ ctx->bstate = BS_STOP;
break;
default:
rn = "unknown";
@@ -1450,6 +1472,7 @@
}
#endif
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
}
static void gen_cp0 (DisasContext *ctx, uint16_t opc, int rt, int rd)
@@ -1464,6 +1487,7 @@
fprintf(logfile, "CP0 is not usable\n");
}
generate_exception_err (ctx, EXCP_CpU, 0);
+ ctx->bstate = BS_EXCP;
return;
}
switch (opc) {
@@ -1483,8 +1507,6 @@
ctx->pc -= 4;
GEN_LOAD_REG_TN(T0, rt);
gen_mtc0(ctx, rd, ctx->opcode & 0x7);
- /* Stop translation as we may have switched the execution mode */
- ctx->bstate = BS_STOP;
opn = "mtc0";
break;
#if defined(MIPS_USES_R4K_TLB)
@@ -1537,6 +1559,7 @@
((ctx->opcode >> 16) & 0x1F));
}
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
return;
}
MIPS_DEBUG("%s %s %d", opn, regnames[rt], rd);
@@ -1643,9 +1666,11 @@
break;
case 0x0C: /* SYSCALL */
generate_exception(ctx, EXCP_SYSCALL);
+ ctx->bstate = BS_EXCP;
break;
case 0x0D: /* BREAK */
generate_exception(ctx, EXCP_BREAK);
+ ctx->bstate = BS_EXCP;
break;
case 0x0F: /* SYNC */
/* Treat as a noop */
@@ -1660,6 +1685,7 @@
#else
/* Not implemented */
generate_exception_err (ctx, EXCP_CpU, 1);
+ ctx->bstate = BS_EXCP;
#endif
break;
@@ -1676,6 +1702,7 @@
default: /* Invalid */
MIPS_INVAL("special");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
break;
}
break;
@@ -1701,14 +1728,17 @@
*/
if (!(ctx->hflags & MIPS_HFLAG_DM)) {
generate_exception(ctx, EXCP_DBp);
+ ctx->bstate = BS_EXCP;
} else {
generate_exception(ctx, EXCP_DBp);
+ ctx->bstate = BS_EXCP;
}
/* Treat as a noop */
break;
default: /* Invalid */
MIPS_INVAL("special2");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
break;
}
break;
@@ -1726,6 +1756,7 @@
default: /* Invalid */
MIPS_INVAL("REGIMM");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
break;
}
break;
@@ -1777,6 +1808,7 @@
/* XXX: not correct */
#else
generate_exception_err(ctx, EXCP_CpU, 1);
+ ctx->bstate = BS_EXCP;
#endif
break;
@@ -1788,11 +1820,13 @@
case 0x12: /* CP2 opcode */
/* Not implemented */
generate_exception_err(ctx, EXCP_CpU, 2);
+ ctx->bstate = BS_EXCP;
break;
case 0x13: /* CP3 opcode */
/* Not implemented */
generate_exception_err(ctx, EXCP_CpU, 3);
+ ctx->bstate = BS_EXCP;
break;
#if defined (TARGET_MIPS64)
@@ -1811,6 +1845,7 @@
default: /* Invalid */
MIPS_INVAL("");
generate_exception(ctx, EXCP_RI);
+ ctx->bstate = BS_EXCP;
break;
}
if (ctx->hflags & MIPS_HFLAG_BMASK) {
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