Re: [Qemu-devel] Wrong reset of MIPS hflags EXL after interrupt?

[Marius Groeger]

On Wed, 16 Aug 2006, Thiemo Seufer wrote:

> Dirk Behme wrote:
> > Hi,
> >
> > I'm not sure, but while playing with MIPS interrupts, it
> > seems to me that something with reset of interrupt flag
> > MIPS_HFLAG_EXL (0x04) at exception exit (eret) is wrong. It
> > seems to me that only one interrupt is executed because
> > after eret, MIPS_HFLAG_EXL stays set in env->hflags. Then,
> > at next interrupt, system correctly checks for
> > MIPS_HFLAG_EXL, but this is still set and no further
> > interrupt happens.

Dirk and I have been following up on this privately and could verify that it
was indeed an issue with the testcase. QEMU is not causing any problem 
here.

> This explains some weirdness I saw on my hacked up qemu
> when running a mips32r2-compiled Linux kernel.

What exactly included that hack? Some new mips32r2 insns like rdhw?

FWIW, since there seems to be some FUD in the air, occasionally: I 
would like to state that Linux 2.6.15 and QEMU CVS HEAD works for me 
out-of-the-box. I'm using a MIPS r4k big endian configuration.

On Thu, 17 Aug 2006, Marius Groeger wrote:

> Having said that, I'm currently playing with nested interrupts - let's see
> how that checks out... :-)

I would like to take the opportunity to state that I verified nested
interrupts on QEMU and they seem to be working. The tested sequence was:

userspace
 -> NIC interrupt exception
 -> interrupt service for NIC
 -> Enable interrupts
    -> Timer interrupt exception
        -> interrupt service for Timer
        -> Enable Interrupts
        -> ERET
        ERET
back in userspace

Regards,
Marius

--
Marius Groeger <address@hidden>
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