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Re: [Qemu-devel] ARM load/store multiple bug


From: Paul Brook
Subject: Re: [Qemu-devel] ARM load/store multiple bug
Date: Sun, 10 Sep 2006 00:43:08 +0100
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> ---8<---
>                          if (n != 1)
>                              gen_op_addl_T1_im(-((n - 1) * 4));
>                      }
>                  }
>                  j = 0;
> /* Insert something like gen_op_bicl_T1_im(3); here */
>                  for(i=0;i<16;i++) {
>                      if (insn & (1 << i)) {
>                          if (insn & (1 << 20)) {
> ---8<---

This is not sufficient. It breaks base register writeback.

I'll also note that the behavior is dependent on alignment traps being 
disabled (and unaligned access on some cores). ie. for linux user mode 
emulation the current behavior is acceptable.

Paul




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