Re: [Qemu-devel] ARM CPU Speed simulated by Qemu?

[Paul Brook]

> How much do misses on the branch prediction level cost? How much
> pipeline interlocks? I don't think those would be _that_ dramatic. Since
> today's compilers are said to be optimizing quite well...

It all depends on the code you're running. Certainly branch prediction can 
have a major effect if the hardware consistently gets it wrong. Even arm 
hardware has 5/7 stage pipelines that need flushing on a mispredict.

Pipeline interlocks are likely to be relatively small, for most Arm hardware 
at least (ia64 is a completely different story :-). As a compiler author I'd 
generally expect a few % performance improvement from a good scheduling 
model.

I wouldn't assuming the compiler gets everything right, as it's quite common 
for systems to be built for the lowest common denominator target.

Paul